projects / openwrt / staging / ansuel.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: eb39558) | patch
ramips: sync upstream Ralink clock patches
authorShiji Yang <[email protected]>
Fri, 22 Nov 2024 10:12:12 +0000 (18:12 +0800)
committerHauke Mehrtens <[email protected]>
Sat, 23 Nov 2024 14:05:48 +0000 (15:05 +0100)
commit7bb99bca3dfd878e6ad950b218c0cb96d36d14f4
tree3ed4f1e440d15c3b1067ab2a7fc87209a7c158f3tree | snapshot
parenteb395585ae1b7560bbcea9544f428db2a9105152commit | diff
ramips: sync upstream Ralink clock patches

1. Add sdhc clock for MT7620 and MT76x8 SoCs.
2. Fix clock driver warning for RT2880, RT305x and RT3883.

Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Shiji Yang <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/17037
Signed-off-by: Hauke Mehrtens <[email protected]>
target/linux/ramips/dts/mt7620a.dtsi diff | blob | history
target/linux/ramips/dts/mt7620n.dtsi diff | blob | history
target/linux/ramips/dts/mt7628an.dtsi diff | blob | history
target/linux/ramips/dts/rt3883.dtsi diff | blob | history
target/linux/ramips/patches-6.6/002-01-v6.13-clk-ralink-mtmips-fix-clock-plan-for-Ralink-SoC-RT38.patch [new file with mode: 0644] blob
target/linux/ramips/patches-6.6/002-02-v6.13-clk-ralink-mtmips-fix-clocks-probe-order-in-oldest-r.patch [new file with mode: 0644] blob
target/linux/ramips/patches-6.6/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch [new file with mode: 0644] blob
target/linux/ramips/patches-6.6/100-clk-ralink-mtmips-fix-clock-plan-for-Ralink-SoC-RT3883.patch [deleted file] blob | history
Staging tree of Christian Marangi