MIPS: mm: Fix MIPS32 36b physical addressing (alchemy, netlogic)

MIPS: mm: Fix MIPS32 36b physical addressing (alchemy, netlogic)

There are 2 distinct cases in which a kernel for a MIPS32 CPU
(CONFIG_CPU_MIPS32=y) may use 64 bit physical addresses
(CONFIG_PHYS_ADDR_T_64BIT=y):

  - 36 bit physical addressing as used by RMI Alchemy & Netlogic XLP/XLR
    CPUs.

  - MIPS32r5 eXtended Physical Addressing (XPA).

These 2 cases are distinct in that they require different behaviour from
the kernel - the EntryLo registers have different formats. Until Linux
v4.1 we only supported the first case, with code conditional upon the 2
aforementioned Kconfig variables being set. Commit c5b367835cfc ("MIPS:
Add support for XPA.") added support for the second case, but did so by
modifying the code that existed for the first case rather than treating
the 2 cases as distinct. Since the EntryLo registers have different
formats this breaks the 36 bit Alchemy/XLP/XLR case. Fix this by
splitting the 2 cases, with XPA cases now being conditional upon
CONFIG_XPA and the non-XPA case matching the code as it existed prior to
commit c5b367835cfc ("MIPS: Add support for XPA.").

Signed-off-by: Paul Burton <[email protected]>
Reported-by: Manuel Lauss <[email protected]>
Tested-by: Manuel Lauss <[email protected]>
Fixes: c5b367835cfc ("MIPS: Add support for XPA.")
Cc: James Hogan <[email protected]>
Cc: David Daney <[email protected]>
Cc: Huacai Chen <[email protected]>
Cc: Maciej W. Rozycki <[email protected]>
Cc: Paul Gortmaker <[email protected]>
Cc: Aneesh Kumar K.V <[email protected]>
Cc: Peter Zijlstra (Intel) <[email protected]>
Cc: David Hildenbrand <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Alex Smith <[email protected]>
Cc: Kirill A. Shutemov <[email protected]>
Cc: [email protected] # v4.1+
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13119/
Signed-off-by: Ralf Baechle <[email protected]>