ARM: dts: correct the dw-mshc timing properties as per binding

ARM: dts: correct the dw-mshc timing properties as per binding

As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and
dw-mshc-ddr-timing properties are having only two cells, these properties
are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This
patch corrects above timing propreties for above platfroms

Signed-off-by: Alim Akhtar <[email protected]>
Tested-by: Doug Anderson <[email protected]>
Acked-by: Doug Anderson <[email protected]>
Signed-off-by: Kukjin Kim <[email protected]>