projects / openwrt / staging / ansuel.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 4f1e548) | patch
mediatek: filogic: fix mt7986a ethernet devicetree entries
authorFelix Fietkau <[email protected]>
Sun, 30 Oct 2022 06:15:36 +0000 (07:15 +0100)
committerFelix Fietkau <[email protected]>
Wed, 9 Nov 2022 19:43:51 +0000 (20:43 +0100)
commit5faff99c7b1e1da1901e539f3c677e5b31454045
treea8182e865688a9558bb33db7289fe14593a533b5tree | snapshot
parent4f1e54801ef9d43c6202f007f0ce8fcbee2ed369commit | diff
mediatek: filogic: fix mt7986a ethernet devicetree entries

Add all ports, rename DSA ports to start at lan1

Signed-off-by: Felix Fietkau <[email protected]>
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi diff | blob | history
Staging tree of Christian Marangi