Workaround for Neoverse N1 erratum 1257314
authorlauwal01 <[email protected]>
Mon, 24 Jun 2019 16:42:02 +0000 (11:42 -0500)
committerlauwal01 <[email protected]>
Tue, 2 Jul 2019 14:16:32 +0000 (09:16 -0500)
commit335b3c79c79dcfc04e9776ce2e21c3b16aa6febf
tree7af15c666969446e6b24b141048d5edad882101e
parent9eceb020d79614cf41d64f6eae4086f3b5390203
Workaround for Neoverse N1 erratum 1257314

Neoverse N1 erratum 1257314 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR3_EL1 system register, which prevents parallel
execution of divide and square root instructions.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html

Change-Id: I54f0f40ff9043efee40d51e796b92ed85b394cbb
Signed-off-by: Lauren Wehrmeister <[email protected]>
docs/design/cpu-specific-build-macros.rst
include/lib/cpus/aarch64/neoverse_n1.h
lib/cpus/aarch64/neoverse_n1.S
lib/cpus/cpu-ops.mk