realtek: pcs: rtl930x: reconfigure PLL of neighbor SerDes when needed

realtek: pcs: rtl930x: reconfigure PLL of neighbor SerDes when needed

On RTL930x, each SerDes pair shares a set of PLLs with different
capabilities (LC PLL: 1G/2.5G/10G, ring PLL: 1G/2.5G). In principle,
this allows any combination of speeds on a SerDes pair. However, it
creates a special case when trying to configure a SerDes for 10G while
the LC PLL is already in use at a slower speed for the neighbor SerDes.
The current implementation just gives up in that case. Instead, free up
the LC PLL by reconfiguring the neighbor SerDes to the ring PLL.

Signed-off-by: Jan Hoffmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/20568
Signed-off-by: Robert Marko <[email protected]>