net: pch_gbe: Add cache maintenance

net: pch_gbe: Add cache maintenance

On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.

Signed-off-by: Paul Burton <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-by: Bin Meng <[email protected]>
Signed-off-by: Daniel Schwierzeck <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>