bcm63xx_enet: split DMA channel register accesses
authorMaxime Bizon <[email protected]>
Tue, 4 Jun 2013 21:53:34 +0000 (22:53 +0100)
committerDavid S. Miller <[email protected]>
Mon, 10 Jun 2013 21:28:27 +0000 (14:28 -0700)
commit0ae99b5fede6f3a8d252d50bb4aba29544295219
tree3be7197f59057e81f9167f81b658a5eba6cb10cc
parent7260aac97447a2b2cb9e8684d1162118c4426354
bcm63xx_enet: split DMA channel register accesses

The current bcm63xx_enet driver always uses bcmenet_shared_base whenever
it needs to access DMA channel configuration space or access the DMA
channel state RAM. Split these register in 3 parts to be more accurate:

- global DMA configuration
- per DMA channel configuration space
- per DMA channel state RAM space

This is preliminary to support new chips where the global DMA
configuration remains the same, but there is a varying number of DMA
channels located at a different memory offset.

Signed-off-by: Maxime Bizon <[email protected]>
Signed-off-by: Jonas Gorski <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
arch/mips/bcm63xx/dev-enet.c
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
drivers/net/ethernet/broadcom/bcm63xx_enet.c