ff31b23800acde454f5d72b08b79c1879af15b4c
[openwrt/staging/thess.git] /
1 From 7f7315db3d262298ab33d198d3f0b09cabfa7b6b Mon Sep 17 00:00:00 2001
2 From: Lorenzo Bianconi <lorenzo@kernel.org>
3 Date: Tue, 6 Aug 2024 17:55:48 +0200
4 Subject: [PATCH] phy: airoha: adjust initialization delay in
5 airoha_pcie_phy_init()
6
7 Align phy-pcie initialization delay to the vendor sdk in
8 airoha_pcie_phy_init routine and allow the hw to complete required
9 configuration before proceeding
10
11 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
12 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
13 Link: https://lore.kernel.org/r/8af6f27857619f1e0dd227f08b8584ae8fb22fb2.1722959625.git.lorenzo@kernel.org
14 Signed-off-by: Vinod Koul <vkoul@kernel.org>
15 ---
16 drivers/phy/phy-airoha-pcie.c | 6 +++++-
17 1 file changed, 5 insertions(+), 1 deletion(-)
18
19 --- a/drivers/phy/phy-airoha-pcie.c
20 +++ b/drivers/phy/phy-airoha-pcie.c
21 @@ -18,6 +18,9 @@
22 #define LEQ_LEN_CTRL_MAX_VAL 7
23 #define FREQ_LOCK_MAX_ATTEMPT 10
24
25 +/* PCIe-PHY initialization time in ms needed by the hw to complete */
26 +#define PHY_HW_INIT_TIME_MS 30
27 +
28 enum airoha_pcie_port_gen {
29 PCIE_PORT_GEN1 = 1,
30 PCIE_PORT_GEN2,
31 @@ -1181,7 +1184,8 @@ static int airoha_pcie_phy_init(struct p
32 airoha_phy_pma1_set_bits(pcie_phy, REG_PCIE_PMA_SS_DA_XPON_PWDB0,
33 PCIE_DA_XPON_CDR_PR_PWDB);
34
35 - usleep_range(100, 200);
36 + /* Wait for the PCIe PHY to complete initialization before returning */
37 + msleep(PHY_HW_INIT_TIME_MS);
38
39 return 0;
40 }