git.openwrt.org Git - openwrt/staging/nbd.git/blob

   1 From 0327238991ba2d1de25e1116b1c064f433e45b8d Mon Sep 17 00:00:00 2001
   2 From: Shreeya Patel <shreeya.patel@collabora.com>
   3 Date: Fri, 7 Mar 2025 12:18:56 +0300
   4 Subject: arm64: dts: rockchip: Add device tree support for HDMI RX Controller
   5
   6 Add device tree support for Synopsys DesignWare HDMI RX
   7 Controller.
   8
   9 Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
  10 Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
  11 Co-developed-by: Dingxian Wen <shawn.wen@rock-chips.com>
  12 Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com>
  13 Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
  14 Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
  15 Link: https://lore.kernel.org/r/20250307091857.646581-2-dmitry.osipenko@collabora.com
  16 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  17
  18 --- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
  19 +++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
  20 @@ -23,6 +23,30 @@
  21                 };
  22         };
  23
  24 +       reserved-memory {
  25 +               #address-cells = <2>;
  26 +               #size-cells = <2>;
  27 +               ranges;
  28 +
  29 +               /*
  30 +                * The 4k HDMI capture controller works only with 32bit
  31 +                * phys addresses and doesn't support IOMMU. HDMI RX CMA
  32 +                * must be reserved below 4GB.
  33 +                * The size of 160MB was determined as follows:
  34 +                * (3840 * 2160 pixels) * (4 bytes/pixel) * (2 frames/buffer) / 10^6 = 66MB
  35 +                * To ensure sufficient support for practical use-cases,
  36 +                * we doubled the 66MB value.
  37 +                */
  38 +               hdmi_receiver_cma: hdmi-receiver-cma {
  39 +                       compatible = "shared-dma-pool";
  40 +                       alloc-ranges = <0x0 0x0 0x0 0xffffffff>;
  41 +                       size = <0x0 (160 * 0x100000)>; /* 160MiB */
  42 +                       alignment = <0x0 0x40000>; /* 64K */
  43 +                       no-map;
  44 +                       status = "disabled";
  45 +               };
  46 +       };
  47 +
  48         usb_host1_xhci: usb@fc400000 {
  49                 compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
  50                 reg = <0x0 0xfc400000 0x0 0x400000>;
  51 @@ -198,6 +222,37 @@
  52                 };
  53         };
  54
  55 +       hdmi_receiver: hdmi_receiver@fdee0000 {
  56 +               compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx";
  57 +               reg = <0x0 0xfdee0000 0x0 0x6000>;
  58 +               interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH 0>,
  59 +                            <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH 0>,
  60 +                            <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH 0>;
  61 +               interrupt-names = "cec", "hdmi", "dma";
  62 +               clocks = <&cru ACLK_HDMIRX>,
  63 +                        <&cru CLK_HDMIRX_AUD>,
  64 +                        <&cru CLK_CR_PARA>,
  65 +                        <&cru PCLK_HDMIRX>,
  66 +                        <&cru CLK_HDMIRX_REF>,
  67 +                        <&cru PCLK_S_HDMIRX>,
  68 +                        <&cru HCLK_VO1>;
  69 +               clock-names = "aclk",
  70 +                             "audio",
  71 +                             "cr_para",
  72 +                             "pclk",
  73 +                             "ref",
  74 +                             "hclk_s_hdmirx",
  75 +                             "hclk_vo1";
  76 +               memory-region = <&hdmi_receiver_cma>;
  77 +               power-domains = <&power RK3588_PD_VO1>;
  78 +               resets = <&cru SRST_A_HDMIRX>, <&cru SRST_P_HDMIRX>,
  79 +                        <&cru SRST_HDMIRX_REF>, <&cru SRST_A_HDMIRX_BIU>;
  80 +               reset-names = "axi", "apb", "ref", "biu";
  81 +               rockchip,grf = <&sys_grf>;
  82 +               rockchip,vo1-grf = <&vo1_grf>;
  83 +               status = "disabled";
  84 +       };
  85 +
  86         pcie3x4: pcie@fe150000 {
  87                 compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
  88                 #address-cells = <3>;