git.openwrt.org Git - openwrt/staging/xback.git/blob

   1 From e4c7dfd953f7618f0ccb70d87c1629634f306fab Mon Sep 17 00:00:00 2001
   2 From: Lorenzo Bianconi <lorenzo@kernel.org>
   3 Date: Wed, 8 Jan 2025 10:50:41 +0100
   4 Subject: [PATCH 2/6] PCI: mediatek-gen3: Move reset/assert callbacks in
   5  .power_up()
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 In order to make the code more readable, the reset_control_bulk_assert()
  11 function for PHY reset lines is moved to make it pair with
  12 reset_control_bulk_deassert() in mtk_pcie_power_up() and
  13 mtk_pcie_en7581_power_up(). The same change is done for
  14 reset_control_assert() used to assert MAC reset line.
  15
  16 Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to
  17 complete PCIe reset on MediaTek controller.
  18
  19 Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-2-21ac939a3b9b@kernel.org
  20 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  21 Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
  22 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  23 Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  24 ---
  25  drivers/pci/controller/pcie-mediatek-gen3.c | 28 +++++++++++++--------
  26  1 file changed, 18 insertions(+), 10 deletions(-)
  27
  28 --- a/drivers/pci/controller/pcie-mediatek-gen3.c
  29 +++ b/drivers/pci/controller/pcie-mediatek-gen3.c
  30 @@ -120,6 +120,8 @@
  31
  32  #define MAX_NUM_PHY_RESETS             3
  33
  34 +#define PCIE_MTK_RESET_TIME_US         10
  35 +
  36  /* Time in ms needed to complete PCIe reset on EN7581 SoC */
  37  #define PCIE_EN7581_RESET_TIME_MS      100
  38
  39 @@ -875,9 +877,14 @@ static int mtk_pcie_en7581_power_up(stru
  40         u32 val;
  41
  42         /*
  43 -        * Wait for the time needed to complete the bulk assert in
  44 -        * mtk_pcie_setup for EN7581 SoC.
  45 +        * The controller may have been left out of reset by the bootloader
  46 +        * so make sure that we get a clean start by asserting resets here.
  47          */
  48 +       reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
  49 +                                 pcie->phy_resets);
  50 +       reset_control_assert(pcie->mac_reset);
  51 +
  52 +       /* Wait for the time needed to complete the reset lines assert. */
  53         mdelay(PCIE_EN7581_RESET_TIME_MS);
  54
  55         err = phy_init(pcie->phy);
  56 @@ -944,6 +951,15 @@ static int mtk_pcie_power_up(struct mtk_
  57         struct device *dev = pcie->dev;
  58         int err;
  59
  60 +       /*
  61 +        * The controller may have been left out of reset by the bootloader
  62 +        * so make sure that we get a clean start by asserting resets here.
  63 +        */
  64 +       reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
  65 +                                 pcie->phy_resets);
  66 +       reset_control_assert(pcie->mac_reset);
  67 +       usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US);
  68 +
  69         /* PHY power on and enable pipe clock */
  70         err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
  71         if (err) {
  72 @@ -1016,14 +1032,6 @@ static int mtk_pcie_setup(struct mtk_gen
  73          * counter since the bulk is shared.
  74          */
  75         reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
  76 -       /*
  77 -        * The controller may have been left out of reset by the bootloader
  78 -        * so make sure that we get a clean start by asserting resets here.
  79 -        */
  80 -       reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
  81 -
  82 -       reset_control_assert(pcie->mac_reset);
  83 -       usleep_range(10, 20);
  84
  85         /* Don't touch the hardware registers before power up */
  86         err = pcie->soc->power_up(pcie);