git.openwrt.org Git - openwrt/staging/blocktrron.git/blob

   1 From 1090c6df3767da2c56d5827ba65ce91af8745420 Mon Sep 17 00:00:00 2001
   2 From: Weijie Gao <weijie.gao@mediatek.com>
   3 Date: Fri, 17 Jan 2025 17:18:41 +0800
   4 Subject: [PATCH 13/15] arm: dts: medaitek: add flash interface driving
   5  settings for mt7988
   6
   7 Add driving settings for both SPI and SD/eMMC interfaces to support ensure
   8 flash devices is accessible for ram-booting.
   9
  10 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  11 ---
  12  arch/arm/dts/mt7988-rfb.dts | 32 ++++++++++++++++++++++++++++++++
  13  1 file changed, 32 insertions(+)
  14
  15 --- a/arch/arm/dts/mt7988-rfb.dts
  16 +++ b/arch/arm/dts/mt7988-rfb.dts
  17 @@ -101,6 +101,19 @@
  18                         function = "spi";
  19                         groups = "spi0", "spi0_wp_hold";
  20                 };
  21 +
  22 +               conf-pu {
  23 +                       pins = "SPI0_CSB", "SPI0_HOLD", "SPI0_WP";
  24 +                       drive-strength = <MTK_DRIVE_8mA>;
  25 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
  26 +               };
  27 +
  28 +               conf-pd {
  29 +                       pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
  30 +                       drive-strength = <MTK_DRIVE_8mA>;
  31 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
  32 +               };
  33 +
  34         };
  35
  36         spi2_pins: spi2-pins {
  37 @@ -108,6 +121,18 @@
  38                         function = "spi";
  39                         groups = "spi2", "spi2_wp_hold";
  40                 };
  41 +
  42 +               conf-pu {
  43 +                       pins = "SPI2_CSB", "SPI2_HOLD", "SPI2_WP";
  44 +                       drive-strength = <MTK_DRIVE_8mA>;
  45 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
  46 +               };
  47 +
  48 +               conf-pd {
  49 +                       pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
  50 +                       drive-strength = <MTK_DRIVE_8mA>;
  51 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
  52 +               };
  53         };
  54
  55         mmc0_pins_default: mmc0default {
  56 @@ -121,18 +146,25 @@
  57                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
  58                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
  59                         input-enable;
  60 +                       drive-strength = <MTK_DRIVE_4mA>;
  61 +                       mediatek,pull-up-adv = <1>;     /* pull-up 10K */
  62                 };
  63
  64                 conf-clk {
  65                         pins = "EMMC_CK";
  66 +                       drive-strength = <MTK_DRIVE_6mA>;
  67 +                       mediatek,pull-down-adv = <2>;   /* pull-down 50K */
  68                 };
  69
  70                 conf-dsl {
  71                         pins = "EMMC_DSL";
  72 +                       mediatek,pull-down-adv = <2>;   /* pull-down 50K */
  73                 };
  74
  75                 conf-rst {
  76                         pins = "EMMC_RSTB";
  77 +                       drive-strength = <MTK_DRIVE_4mA>;
  78 +                       mediatek,pull-up-adv = <1>;     /* pull-up 10K */
  79                 };
  80         };
  81  };