1 From fe733618b27a8c033f0d246c2efff56fca322656 Mon Sep 17 00:00:00 2001
2 From: Heiner Kallweit <hkallweit1@gmail.com>
3 Date: Tue, 15 Apr 2025 21:39:23 +0200
4 Subject: [PATCH] r8169: add RTL_GIGA_MAC_VER_LAST to facilitate adding support
7 Add a new mac_version enum value RTL_GIGA_MAC_VER_LAST. Benefit is that
8 when adding support for a new chip version we have to touch less code,
9 except something changes fundamentally.
11 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
12 Reviewed-by: Simon Horman <horms@kernel.org>
13 Link: https://patch.msgid.link/06991f47-2aec-4aa2-8918-2c6e79332303@gmail.com
14 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
16 drivers/net/ethernet/realtek/r8169.h | 3 ++-
17 drivers/net/ethernet/realtek/r8169_main.c | 28 +++++++++++------------
18 2 files changed, 16 insertions(+), 15 deletions(-)
20 --- a/drivers/net/ethernet/realtek/r8169.h
21 +++ b/drivers/net/ethernet/realtek/r8169.h
22 @@ -73,7 +73,8 @@ enum mac_version {
28 + RTL_GIGA_MAC_VER_LAST = RTL_GIGA_MAC_NONE - 1
31 struct rtl8169_private;
32 --- a/drivers/net/ethernet/realtek/r8169_main.c
33 +++ b/drivers/net/ethernet/realtek/r8169_main.c
34 @@ -1290,7 +1290,7 @@ static void rtl_writephy(struct rtl8169_
35 case RTL_GIGA_MAC_VER_31:
36 r8168dp_2_mdio_write(tp, location, val);
38 - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
39 + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:
40 r8168g_mdio_write(tp, location, val);
43 @@ -1305,7 +1305,7 @@ static int rtl_readphy(struct rtl8169_pr
44 case RTL_GIGA_MAC_VER_28:
45 case RTL_GIGA_MAC_VER_31:
46 return r8168dp_2_mdio_read(tp, location);
47 - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
48 + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:
49 return r8168g_mdio_read(tp, location);
51 return r8169_mdio_read(tp, location);
52 @@ -1657,7 +1657,7 @@ static void __rtl8169_set_wol(struct rtl
54 case RTL_GIGA_MAC_VER_34:
55 case RTL_GIGA_MAC_VER_37:
56 - case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
57 + case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_LAST:
58 r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
61 @@ -2130,7 +2130,7 @@ static void rtl_set_eee_txidle_timer(str
62 tp->tx_lpi_timer = timer_val;
63 r8168_mac_ocp_write(tp, 0xe048, timer_val);
65 - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
66 + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:
67 tp->tx_lpi_timer = timer_val;
68 RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
70 @@ -2495,7 +2495,7 @@ static void rtl_init_rxcfg(struct rtl816
71 case RTL_GIGA_MAC_VER_61:
72 RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
74 - case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
75 + case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_LAST:
76 RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
79 @@ -2627,7 +2627,7 @@ static void rtl_wait_txrx_fifo_empty(str
80 case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
81 rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
83 - case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
84 + case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_LAST:
85 RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
86 rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
87 rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
88 @@ -2902,7 +2902,7 @@ static void rtl_enable_exit_l1(struct rt
89 case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
90 rtl_eri_set_bits(tp, 0xd4, 0x0c00);
92 - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
93 + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:
94 r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
97 @@ -2916,7 +2916,7 @@ static void rtl_disable_exit_l1(struct r
98 case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
99 rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
101 - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
102 + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:
103 r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
106 @@ -2954,7 +2954,7 @@ static void rtl_hw_aspm_clkreq_enable(st
108 switch (tp->mac_version) {
109 case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
110 - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
111 + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:
112 /* reset ephy tx/rx disable timer */
113 r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
114 /* chip can trigger L1.2 */
115 @@ -2966,7 +2966,7 @@ static void rtl_hw_aspm_clkreq_enable(st
117 switch (tp->mac_version) {
118 case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
119 - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
120 + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:
121 r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
124 @@ -4098,7 +4098,7 @@ static void rtl8169_cleanup(struct rtl81
125 RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
126 rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
128 - case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
129 + case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:
130 rtl_enable_rxdvgate(tp);
133 @@ -4255,7 +4255,7 @@ static unsigned int rtl_quirk_packet_pad
135 switch (tp->mac_version) {
136 case RTL_GIGA_MAC_VER_34:
137 - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
138 + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:
139 padto = max_t(unsigned int, padto, ETH_ZLEN);
142 @@ -5311,7 +5311,7 @@ static void rtl_hw_initialize(struct rtl
143 case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
144 rtl_hw_init_8168g(tp);
146 - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
147 + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:
148 rtl_hw_init_8125(tp);
151 @@ -5336,7 +5336,7 @@ static int rtl_jumbo_max(struct rtl8169_
152 case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
155 - case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
156 + case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST: