dbc5caf82d1ced5363d0fadc81466cea2f3f875a
[openwrt/staging/nbd.git] /
1 From 52cababc9c1914ebf50929bfb9a67c8f74cd60ab Mon Sep 17 00:00:00 2001
2 From: Alexey Charkov <alchark@gmail.com>
3 Date: Tue, 4 Feb 2025 13:02:28 +0400
4 Subject: arm64: dts: rockchip: switch Rock 5C to PMIC-based TSHUT reset
5
6 Radxa Rock 5C supports both CRU-based (default) and PMIC-based reset
7 upon thermal runaway conditions. The former resets the SoC by internally
8 poking the CRU from TSADC, while the latter power-cycles the whole board
9 by pulling the PMIC reset line low in case of uncontrolled overheating.
10
11 Switch to a PMIC-based reset, as the more 'thorough' of the two.
12
13 Tested by temporarily setting rockchip,hw-tshut-temp to 65C to simulate
14 overheating - this causes the board to reset when any of the on-chip
15 temperature sensors surpasses the tshut temperature.
16
17 Requires Alexander's patch [1] fixing TSADC pinctrl assignment
18
19 [1] https://lore.kernel.org/r/20250130053849.4902-1-eagle.alexander923@gmail.com
20
21 Signed-off-by: Alexey Charkov <alchark@gmail.com>
22 Reviewed-by: Dragan Simic <dsimic@manjaro.org>
23 Link: https://lore.kernel.org/r/20250204-rock-5c-tshut-v1-1-33301e4eef64@gmail.com
24 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
25
26 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
27 +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
28 @@ -873,6 +873,8 @@
29 };
30
31 &tsadc {
32 + rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
33 + rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
34 status = "okay";
35 };
36