1 From 50799703c6c8ec0860e19b102dd7cca3d29028e1 Mon Sep 17 00:00:00 2001
2 From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
3 Date: Fri, 10 Nov 2023 14:49:34 +0530
4 Subject: [PATCH] firmware: qcom_scm: ipq5332: add support to pass
7 IPQ5332 security software running under trustzone
8 requires metadata size. With V2 cmd, pass metadata
11 Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
13 drivers/firmware/qcom//qcom_scm.c | 8 ++++++++
14 drivers/firmware/qcom//qcom_scm.h | 1 +
15 2 files changed, 9 insertions(+)
17 --- a/drivers/firmware/qcom/qcom_scm.c
18 +++ b/drivers/firmware/qcom/qcom_scm.c
19 @@ -686,6 +686,14 @@ int qcom_scm_pas_mem_setup(u32 periphera
23 + if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL,
24 + QCOM_SCM_PAS_INIT_IMAGE_V2)) {
25 + desc.cmd = QCOM_SCM_PAS_INIT_IMAGE_V2;
27 + QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_RW, QCOM_SCM_VAL);
28 + desc.args[2] = size;
31 ret = qcom_scm_call(__scm->dev, &desc, &res);
32 qcom_scm_bw_disable();
34 --- a/drivers/firmware/qcom/qcom_scm.h
35 +++ b/drivers/firmware/qcom/qcom_scm.h
36 @@ -96,6 +96,7 @@ struct qcom_tzmem_pool *qcom_scm_get_tzm
38 #define QCOM_SCM_SVC_PIL 0x02
39 #define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01
40 +#define QCOM_SCM_PAS_INIT_IMAGE_V2 0x1a
41 #define QCOM_SCM_PIL_PAS_MEM_SETUP 0x02
42 #define QCOM_SCM_PIL_PAS_AUTH_AND_RESET 0x05
43 #define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06