git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From 00224650dd45e166ea6eb1593f5f064583963ccf Mon Sep 17 00:00:00 2001
   2 From: FUKAUMI Naoki <naoki@radxa.com>
   3 Date: Sun, 23 Jun 2024 11:33:28 +0900
   4 Subject: [PATCH] arm64: dts: rockchip: add (but disabled) SFC node for Radxa
   5  ROCK 5A
   6
   7 This commit adds SFC node for Radxa ROCK 5A.
   8
   9 since sdhci and sfc on RK3588s share pins(i.e. exclusive), it cannot
  10 be enabled both nodes at the same time. so status = "okay" is omitted
  11 here.
  12
  13 you may be able to enable sfc (and disable sdhci) by fdt overlay.
  14
  15 SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency.
  16
  17 Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
  18 Link: https://lore.kernel.org/r/20240623023329.1044-2-naoki@radxa.com
  19 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  20 ---
  21  arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 13 +++++++++++++
  22  1 file changed, 13 insertions(+)
  23
  24 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
  25 +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
  26 @@ -376,6 +376,19 @@
  27         status = "okay";
  28  };
  29
  30 +&sfc {
  31 +       pinctrl-names = "default";
  32 +       pinctrl-0 = <&fspim0_pins>;
  33 +
  34 +       flash@0 {
  35 +               compatible = "jedec,spi-nor";
  36 +               reg = <0>;
  37 +               spi-max-frequency = <104000000>;
  38 +               spi-rx-bus-width = <4>;
  39 +               spi-tx-bus-width = <1>;
  40 +       };
  41 +};
  42 +
  43  &spi2 {
  44         status = "okay";
  45         assigned-clocks = <&cru CLK_SPI2>;