git.openwrt.org Git - openwrt/staging/blocktrron.git/blob

   1 From 2585ada646e4dcf152ab813a24d667e6903105f4 Mon Sep 17 00:00:00 2001
   2 From: Shiji Yang <yangshiji66@outlook.com>
   3 Date: Sun, 22 Dec 2024 17:06:59 +0800
   4 Subject: [PATCH 4/4] rt2x00: fix register operation on RXIQ calibration
   5
   6 In rt2800_rxiq_calibration(), some variables are overwritten
   7 before being used. Based on the values of the relevant registers
   8 in other functions, I believe the correct operation should be
   9 bit mask writing.
  10
  11 Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
  12 ---
  13  drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 14 +++++++-------
  14  1 file changed, 7 insertions(+), 7 deletions(-)
  15
  16 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  17 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  18 @@ -8846,7 +8846,7 @@ static void rt2800_rxiq_calibration(stru
  19                 rt2x00_warn(rt2x00dev, "Timeout waiting for MAC status in RXIQ calibration\n");
  20
  21         bbpval = bbp4 & (~0x18);
  22 -       bbpval = bbp4 | 0x00;
  23 +       bbpval = bbpval | 0x00;
  24         rt2800_bbp_write(rt2x00dev, 4, bbpval);
  25
  26         bbpval = rt2800_bbp_read(rt2x00dev, 21);
  27 @@ -8928,13 +8928,13 @@ static void rt2800_rxiq_calibration(stru
  28         for (ch_idx = 0; ch_idx < 2; ch_idx = ch_idx + 1) {
  29                 if (ch_idx == 0) {
  30                         rfval = rfb0r1 & (~0x3);
  31 -                       rfval = rfb0r1 | 0x1;
  32 +                       rfval = rfval | 0x1;
  33                         rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
  34                         rfval = rfb0r2 & (~0x33);
  35 -                       rfval = rfb0r2 | 0x11;
  36 +                       rfval = rfval | 0x11;
  37                         rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
  38                         rfval = rfb0r42 & (~0x50);
  39 -                       rfval = rfb0r42 | 0x10;
  40 +                       rfval = rfval | 0x10;
  41                         rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
  42
  43                         rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001006);
  44 @@ -8947,13 +8947,13 @@ static void rt2800_rxiq_calibration(stru
  45                         rt2800_bbp_dcoc_write(rt2x00dev, 1, 0x00);
  46                 } else {
  47                         rfval = rfb0r1 & (~0x3);
  48 -                       rfval = rfb0r1 | 0x2;
  49 +                       rfval = rfval | 0x2;
  50                         rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
  51                         rfval = rfb0r2 & (~0x33);
  52 -                       rfval = rfb0r2 | 0x22;
  53 +                       rfval = rfval | 0x22;
  54                         rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
  55                         rfval = rfb0r42 & (~0x50);
  56 -                       rfval = rfb0r42 | 0x40;
  57 +                       rfval = rfval | 0x40;
  58                         rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
  59
  60                         rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002006);