git.openwrt.org Git - openwrt/staging/thess.git/blob

   1 From 30d9d8f6a2d7e44a9f91737dd409dbc87ac6f6b7 Mon Sep 17 00:00:00 2001
   2 From: Lorenzo Bianconi <lorenzo@kernel.org>
   3 Date: Tue, 15 Oct 2024 09:58:09 +0200
   4 Subject: [PATCH] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration
   5
   6 Fix typo in airoha_fe_init routine configuring CDM2_OAM_QSEL_MASK field
   7 of REG_CDM2_FWD_CFG register.
   8 This bug is not introducing any user visible problem since Frame Engine
   9 CDM2 port is used just by the second QDMA block and we currently enable
  10 just QDMA1 block connected to the MT7530 dsa switch via CDM1 port.
  11
  12 Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet
  13 support for EN7581 SoC")
  14
  15 Reported-by: ChihWei Cheng <chihwei.cheng@airoha.com>
  16 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  17 Reviewed-by: Simon Horman <horms@kernel.org>
  18 Message-ID: <20241015-airoha-eth-cdm2-fixes-v1-1-9dc6993286c3@kernel.org>
  19 Signed-off-by: Andrew Lunn <andrew@lunn.ch>
  20 ---
  21  drivers/net/ethernet/mediatek/airoha_eth.c | 3 ++-
  22  1 file changed, 2 insertions(+), 1 deletion(-)
  23
  24 --- a/drivers/net/ethernet/mediatek/airoha_eth.c
  25 +++ b/drivers/net/ethernet/mediatek/airoha_eth.c
  26 @@ -1369,7 +1369,8 @@ static int airoha_fe_init(struct airoha_
  27         airoha_fe_set(eth, REG_GDM_MISC_CFG,
  28                       GDM2_RDM_ACK_WAIT_PREF_MASK |
  29                       GDM2_CHN_VLD_MODE_MASK);
  30 -       airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK, 15);
  31 +       airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
  32 +                     FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));
  33
  34         /* init fragment and assemble Force Port */
  35         /* NPU Core-3, NPU Bridge Channel-3 */