projects / openwrt / staging / nbd.git / blob
? search:


8a3ee0b17ac5e5a576b8397c50cc474a819a09b0
[openwrt/staging/nbd.git] /
1 From 75d0dd334963fb3e3a85b8ceadd48071daa8165f Mon Sep 17 00:00:00 2001
2 From: Mason Chang <mason-cw.chang@mediatek.com>
3 Date: Mon, 26 May 2025 18:26:58 +0800
4 Subject: [PATCH 2/3] thermal/drivers/mediatek/lvts_thermal: Add lvts commands
5 and their sizes to driver data
6
7 Add LVTS commands and their sizes to driver data in preparation for
8 adding different commands.
9
10 Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
11 Link: https://lore.kernel.org/r/20250526102659.30225-3-mason-cw.chang@mediatek.com
12 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
13 (cherry picked from commit 6203a5e6fd090ed05f6d9b92e33bc7e7679a3dd6)
14 ---
15 drivers/thermal/mediatek/lvts_thermal.c | 65 ++++++++++++++++++++-----
16 1 file changed, 52 insertions(+), 13 deletions(-)
17
18 --- a/drivers/thermal/mediatek/lvts_thermal.c
19 +++ b/drivers/thermal/mediatek/lvts_thermal.c
20 @@ -92,17 +92,6 @@
21
22 #define LVTS_MINIMUM_THRESHOLD 20000
23
24 -static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
25 -/*
26 - * Write device mask: 0xC1030000
27 - */
28 -static const u32 default_init_cmds[] = {
29 - 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
30 - 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
31 - 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
32 - 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
33 -};
34 -
35 static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
36 static int golden_temp_offset;
37
38 @@ -132,7 +121,11 @@ struct lvts_ctrl_data {
39
40 struct lvts_data {
41 const struct lvts_ctrl_data *lvts_ctrl;
42 + const u32 *conn_cmd;
43 + const u32 *init_cmd;
44 int num_lvts_ctrl;
45 + int num_conn_cmd;
46 + int num_init_cmd;
47 int temp_factor;
48 int temp_offset;
49 int gt_calib_bit_offset;
50 @@ -974,9 +967,10 @@ static int lvts_ctrl_set_enable(struct l
51
52 static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
53 {
54 + const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
55 u32 id;
56
57 - lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
58 + lvts_write_config(lvts_ctrl, lvts_data->conn_cmd, lvts_data->num_conn_cmd);
59
60 /*
61 * LVTS_ID : Get ID and status of the thermal controller
62 @@ -995,7 +989,9 @@ static int lvts_ctrl_connect(struct devi
63
64 static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
65 {
66 - lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
67 + const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
68 +
69 + lvts_write_config(lvts_ctrl, lvts_data->init_cmd, lvts_data->num_init_cmd);
70
71 return 0;
72 }
73 @@ -1424,6 +1420,17 @@ static int lvts_resume(struct device *de
74 return 0;
75 }
76
77 +static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
78 +/*
79 + * Write device mask: 0xC1030000
80 + */
81 +static const u32 default_init_cmds[] = {
82 + 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
83 + 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
84 + 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
85 + 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
86 +};
87 +
88 /*
89 * The MT8186 calibration data is stored as packed 3-byte little-endian
90 * values using a weird layout that makes sense only when viewed as a 32-bit
91 @@ -1718,7 +1725,11 @@ static const struct lvts_ctrl_data mt819
92
93 static const struct lvts_data mt7988_lvts_ap_data = {
94 .lvts_ctrl = mt7988_lvts_ap_data_ctrl,
95 + .conn_cmd = default_conn_cmds,
96 + .init_cmd = default_init_cmds,
97 .num_lvts_ctrl = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
98 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
99 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
100 .temp_factor = LVTS_COEFF_A_MT7988,
101 .temp_offset = LVTS_COEFF_B_MT7988,
102 .gt_calib_bit_offset = 24,
103 @@ -1726,7 +1737,11 @@ static const struct lvts_data mt7988_lvt
104
105 static const struct lvts_data mt8186_lvts_data = {
106 .lvts_ctrl = mt8186_lvts_data_ctrl,
107 + .conn_cmd = default_conn_cmds,
108 + .init_cmd = default_init_cmds,
109 .num_lvts_ctrl = ARRAY_SIZE(mt8186_lvts_data_ctrl),
110 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
111 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
112 .temp_factor = LVTS_COEFF_A_MT7988,
113 .temp_offset = LVTS_COEFF_B_MT7988,
114 .gt_calib_bit_offset = 24,
115 @@ -1735,7 +1750,11 @@ static const struct lvts_data mt8186_lvt
116
117 static const struct lvts_data mt8188_lvts_mcu_data = {
118 .lvts_ctrl = mt8188_lvts_mcu_data_ctrl,
119 + .conn_cmd = default_conn_cmds,
120 + .init_cmd = default_init_cmds,
121 .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_mcu_data_ctrl),
122 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
123 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
124 .temp_factor = LVTS_COEFF_A_MT8195,
125 .temp_offset = LVTS_COEFF_B_MT8195,
126 .gt_calib_bit_offset = 20,
127 @@ -1744,7 +1763,11 @@ static const struct lvts_data mt8188_lvt
128
129 static const struct lvts_data mt8188_lvts_ap_data = {
130 .lvts_ctrl = mt8188_lvts_ap_data_ctrl,
131 + .conn_cmd = default_conn_cmds,
132 + .init_cmd = default_init_cmds,
133 .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_ap_data_ctrl),
134 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
135 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
136 .temp_factor = LVTS_COEFF_A_MT8195,
137 .temp_offset = LVTS_COEFF_B_MT8195,
138 .gt_calib_bit_offset = 20,
139 @@ -1753,7 +1776,11 @@ static const struct lvts_data mt8188_lvt
140
141 static const struct lvts_data mt8192_lvts_mcu_data = {
142 .lvts_ctrl = mt8192_lvts_mcu_data_ctrl,
143 + .conn_cmd = default_conn_cmds,
144 + .init_cmd = default_init_cmds,
145 .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
146 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
147 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
148 .temp_factor = LVTS_COEFF_A_MT8195,
149 .temp_offset = LVTS_COEFF_B_MT8195,
150 .gt_calib_bit_offset = 24,
151 @@ -1762,7 +1789,11 @@ static const struct lvts_data mt8192_lvt
152
153 static const struct lvts_data mt8192_lvts_ap_data = {
154 .lvts_ctrl = mt8192_lvts_ap_data_ctrl,
155 + .conn_cmd = default_conn_cmds,
156 + .init_cmd = default_init_cmds,
157 .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
158 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
159 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
160 .temp_factor = LVTS_COEFF_A_MT8195,
161 .temp_offset = LVTS_COEFF_B_MT8195,
162 .gt_calib_bit_offset = 24,
163 @@ -1771,7 +1802,11 @@ static const struct lvts_data mt8192_lvt
164
165 static const struct lvts_data mt8195_lvts_mcu_data = {
166 .lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
167 + .conn_cmd = default_conn_cmds,
168 + .init_cmd = default_init_cmds,
169 .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
170 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
171 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
172 .temp_factor = LVTS_COEFF_A_MT8195,
173 .temp_offset = LVTS_COEFF_B_MT8195,
174 .gt_calib_bit_offset = 24,
175 @@ -1780,7 +1815,11 @@ static const struct lvts_data mt8195_lvt
176
177 static const struct lvts_data mt8195_lvts_ap_data = {
178 .lvts_ctrl = mt8195_lvts_ap_data_ctrl,
179 + .conn_cmd = default_conn_cmds,
180 + .init_cmd = default_init_cmds,
181 .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
182 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
183 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
184 .temp_factor = LVTS_COEFF_A_MT8195,
185 .temp_offset = LVTS_COEFF_B_MT8195,
186 .gt_calib_bit_offset = 24,
Felix Fietkaus staging tree