git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From 42145b7a823530f57983fb6e6897f40c0be278d5 Mon Sep 17 00:00:00 2001
   2 From: Sebastian Reichel <sebastian.reichel@collabora.com>
   3 Date: Mon, 18 Sep 2023 16:14:49 +0200
   4 Subject: [PATCH] arm64: dts: rockchip: add PCIe network controller to rock-5b
   5
   6 Enable the RTL8125 network controller, which is connected via
   7 PCIe.
   8
   9 Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
  10 Link: https://lore.kernel.org/r/20230918141451.131247-2-sebastian.reichel@collabora.com
  11 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  12 ---
  13  .../boot/dts/rockchip/rk3588-rock-5b.dts      | 27 +++++++++++++++++++
  14  1 file changed, 27 insertions(+)
  15
  16 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
  17 +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
  18 @@ -43,6 +43,15 @@
  19                 #cooling-cells = <2>;
  20         };
  21
  22 +       vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
  23 +               compatible = "regulator-fixed";
  24 +               regulator-name = "vcc3v3_pcie2x1l2";
  25 +               regulator-min-microvolt = <3300000>;
  26 +               regulator-max-microvolt = <3300000>;
  27 +               startup-delay-us = <5000>;
  28 +               vin-supply = <&vcc_3v3_s3>;
  29 +       };
  30 +
  31         vcc5v0_host: vcc5v0-host-regulator {
  32                 compatible = "regulator-fixed";
  33                 regulator-name = "vcc5v0_host";
  34 @@ -77,6 +86,10 @@
  35         };
  36  };
  37
  38 +&combphy0_ps {
  39 +       status = "okay";
  40 +};
  41 +
  42  &cpu_b0 {
  43         cpu-supply = <&vdd_cpu_big0_s0>;
  44  };
  45 @@ -203,6 +216,14 @@
  46         };
  47  };
  48
  49 +&pcie2x1l2 {
  50 +       pinctrl-names = "default";
  51 +       pinctrl-0 = <&pcie2_2_rst>;
  52 +       reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
  53 +       vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
  54 +       status = "okay";
  55 +};
  56 +
  57  &pinctrl {
  58         hym8563 {
  59                 hym8563_int: hym8563-int {
  60 @@ -216,6 +237,12 @@
  61                 };
  62         };
  63
  64 +       pcie2 {
  65 +               pcie2_2_rst: pcie2-2-rst {
  66 +                       rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
  67 +               };
  68 +       };
  69 +
  70         usb {
  71                 vcc5v0_host_en: vcc5v0-host-en {
  72                         rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;