projects / openwrt / staging / linusw.git / blob
? search:


7ad9e11953b78ce1c271f7e2b44c7fbe1474973e
[openwrt/staging/linusw.git] /
1 From 6722e1358768671c1e5761aa092efb4ae62b2c46 Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Wed, 1 Jan 2025 17:01:34 +0000
4 Subject: [PATCH] media: i2c: imx415: Make HBLANK controllable and in
5 consistent units
6
7 The control of HMAX documented in the datasheet is consistent
8 with being in terms of a scaled INCK, being always 72MHz or
9 74.25MHz. It is NOT link frequency dependent, but the minimum
10 value for HMAX is dictated by the link frequency.
11
12 If PIXEL_RATE is defined as being 12 times the 72 or 74.25MHz,
13 and all values are scaled down again when writing HMAX, then
14 the numbers all work out regardless of INCK or link frequency.
15 Retain an hmax_min (set to the same value as the previous fixed
16 hmax register value) to set as the default value to avoid changing
17 the behaviour for existing users.
18
19 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
20 ---
21 drivers/media/i2c/imx415.c | 86 +++++++++++++++++---------------------
22 1 file changed, 38 insertions(+), 48 deletions(-)
23
24 --- a/drivers/media/i2c/imx415.c
25 +++ b/drivers/media/i2c/imx415.c
26 @@ -27,6 +27,9 @@
27 #define IMX415_PIXEL_ARRAY_VBLANK 58
28 #define IMX415_EXPOSURE_OFFSET 8
29
30 +#define IMX415_PIXEL_RATE_74_25MHZ 891000000
31 +#define IMX415_PIXEL_RATE_72MHZ 864000000
32 +
33 #define IMX415_NUM_CLK_PARAM_REGS 11
34
35 #define IMX415_REG_8BIT(n) ((1 << 16) | (n))
36 @@ -59,6 +62,8 @@
37 #define IMX415_VMAX IMX415_REG_24BIT(0x3024)
38 #define IMX415_VMAX_MAX 0xfffff
39 #define IMX415_HMAX IMX415_REG_16BIT(0x3028)
40 +#define IMX415_HMAX_MAX 0xffff
41 +#define IMX415_HMAX_MULTIPLIER 12
42 #define IMX415_SHR0 IMX415_REG_24BIT(0x3050)
43 #define IMX415_GAIN_PCG_0 IMX415_REG_16BIT(0x3090)
44 #define IMX415_AGAIN_MIN 0
45 @@ -459,7 +464,6 @@ static const struct imx415_clk_params im
46
47 /* all-pixel 2-lane 720 Mbps 15.74 Hz mode */
48 static const struct imx415_reg imx415_mode_2_720[] = {
49 - { IMX415_HMAX, 0x07F0 },
50 { IMX415_LANEMODE, IMX415_LANEMODE_2 },
51 { IMX415_TCLKPOST, 0x006F },
52 { IMX415_TCLKPREPARE, 0x002F },
53 @@ -474,7 +478,6 @@ static const struct imx415_reg imx415_mo
54
55 /* all-pixel 2-lane 1440 Mbps 30.01 Hz mode */
56 static const struct imx415_reg imx415_mode_2_1440[] = {
57 - { IMX415_HMAX, 0x042A },
58 { IMX415_LANEMODE, IMX415_LANEMODE_2 },
59 { IMX415_TCLKPOST, 0x009F },
60 { IMX415_TCLKPREPARE, 0x0057 },
61 @@ -489,7 +492,6 @@ static const struct imx415_reg imx415_mo
62
63 /* all-pixel 4-lane 891 Mbps 30 Hz mode */
64 static const struct imx415_reg imx415_mode_4_891[] = {
65 - { IMX415_HMAX, 0x044C },
66 { IMX415_LANEMODE, IMX415_LANEMODE_4 },
67 { IMX415_TCLKPOST, 0x007F },
68 { IMX415_TCLKPREPARE, 0x0037 },
69 @@ -507,39 +509,10 @@ struct imx415_mode_reg_list {
70 const struct imx415_reg *regs;
71 };
72
73 -/*
74 - * Mode : number of lanes, lane rate and frame rate dependent settings
75 - *
76 - * pixel_rate and hmax_pix are needed to calculate hblank for the v4l2 ctrl
77 - * interface. These values can not be found in the data sheet and should be
78 - * treated as virtual values. Use following table when adding new modes.
79 - *
80 - * lane_rate lanes fps hmax_pix pixel_rate
81 - *
82 - * 594 2 10.000 4400 99000000
83 - * 891 2 15.000 4400 148500000
84 - * 720 2 15.748 4064 144000000
85 - * 1782 2 30.000 4400 297000000
86 - * 2079 2 30.000 4400 297000000
87 - * 1440 2 30.019 4510 304615385
88 - *
89 - * 594 4 20.000 5500 247500000
90 - * 594 4 25.000 4400 247500000
91 - * 720 4 25.000 4400 247500000
92 - * 720 4 30.019 4510 304615385
93 - * 891 4 30.000 4400 297000000
94 - * 1440 4 30.019 4510 304615385
95 - * 1440 4 60.038 4510 609230769
96 - * 1485 4 60.000 4400 594000000
97 - * 1782 4 60.000 4400 594000000
98 - * 2079 4 60.000 4400 594000000
99 - * 2376 4 90.164 4392 891000000
100 - */
101 struct imx415_mode {
102 u64 lane_rate;
103 u32 lanes;
104 - u32 hmax_pix;
105 - u64 pixel_rate;
106 + u32 hmax_min;
107 struct imx415_mode_reg_list reg_list;
108 };
109
110 @@ -548,8 +521,7 @@ static const struct imx415_mode supporte
111 {
112 .lane_rate = 720000000,
113 .lanes = 2,
114 - .hmax_pix = 4064,
115 - .pixel_rate = 144000000,
116 + .hmax_min = 2032,
117 .reg_list = {
118 .num_of_regs = ARRAY_SIZE(imx415_mode_2_720),
119 .regs = imx415_mode_2_720,
120 @@ -558,8 +530,7 @@ static const struct imx415_mode supporte
121 {
122 .lane_rate = 1440000000,
123 .lanes = 2,
124 - .hmax_pix = 4510,
125 - .pixel_rate = 304615385,
126 + .hmax_min = 1066,
127 .reg_list = {
128 .num_of_regs = ARRAY_SIZE(imx415_mode_2_1440),
129 .regs = imx415_mode_2_1440,
130 @@ -568,8 +539,7 @@ static const struct imx415_mode supporte
131 {
132 .lane_rate = 891000000,
133 .lanes = 4,
134 - .hmax_pix = 4400,
135 - .pixel_rate = 297000000,
136 + .hmax_min = 1100,
137 .reg_list = {
138 .num_of_regs = ARRAY_SIZE(imx415_mode_4_891),
139 .regs = imx415_mode_4_891,
140 @@ -601,6 +571,7 @@ static const char *const imx415_test_pat
141 struct imx415 {
142 struct device *dev;
143 struct clk *clk;
144 + unsigned long pixel_rate;
145 struct regulator_bulk_data supplies[ARRAY_SIZE(imx415_supply_names)];
146 struct gpio_desc *reset;
147 struct regmap *regmap;
148 @@ -614,6 +585,7 @@ struct imx415 {
149
150 struct v4l2_ctrl_handler ctrls;
151 struct v4l2_ctrl *vblank;
152 + struct v4l2_ctrl *hblank;
153 struct v4l2_ctrl *hflip;
154 struct v4l2_ctrl *vflip;
155 struct v4l2_ctrl *exposure;
156 @@ -845,6 +817,11 @@ static int imx415_s_ctrl(struct v4l2_ctr
157 case V4L2_CID_TEST_PATTERN:
158 return imx415_set_testpattern(sensor, ctrl->val);
159
160 + case V4L2_CID_HBLANK:
161 + return imx415_write(sensor, IMX415_HMAX,
162 + (format->width + ctrl->val) /
163 + IMX415_HMAX_MULTIPLIER);
164 +
165 default:
166 return -EINVAL;
167 }
168 @@ -858,12 +835,11 @@ static int imx415_ctrls_init(struct imx4
169 {
170 struct v4l2_fwnode_device_properties props;
171 struct v4l2_ctrl *ctrl;
172 - u64 pixel_rate = supported_modes[sensor->cur_mode].pixel_rate;
173 u64 lane_rate = supported_modes[sensor->cur_mode].lane_rate;
174 u32 exposure_max = IMX415_PIXEL_ARRAY_HEIGHT +
175 IMX415_PIXEL_ARRAY_VBLANK -
176 IMX415_EXPOSURE_OFFSET;
177 - u32 hblank;
178 + u32 hblank_min, hblank_max;
179 unsigned int i;
180 int ret;
181
182 @@ -900,12 +876,14 @@ static int imx415_ctrls_init(struct imx4
183 IMX415_AGAIN_MAX, IMX415_AGAIN_STEP,
184 IMX415_AGAIN_MIN);
185
186 - hblank = supported_modes[sensor->cur_mode].hmax_pix -
187 - IMX415_PIXEL_ARRAY_WIDTH;
188 + hblank_min = (supported_modes[sensor->cur_mode].hmax_min *
189 + IMX415_HMAX_MULTIPLIER) - IMX415_PIXEL_ARRAY_WIDTH;
190 + hblank_max = (IMX415_HMAX_MAX * IMX415_HMAX_MULTIPLIER) -
191 + IMX415_PIXEL_ARRAY_WIDTH;
192 ctrl = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops,
193 - V4L2_CID_HBLANK, hblank, hblank, 1, hblank);
194 - if (ctrl)
195 - ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
196 + V4L2_CID_HBLANK, hblank_min,
197 + hblank_max, IMX415_HMAX_MULTIPLIER,
198 + hblank_min);
199
200 sensor->vblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops,
201 V4L2_CID_VBLANK,
202 @@ -913,8 +891,9 @@ static int imx415_ctrls_init(struct imx4
203 IMX415_VMAX_MAX - IMX415_PIXEL_ARRAY_HEIGHT,
204 1, IMX415_PIXEL_ARRAY_VBLANK);
205
206 - v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE, pixel_rate,
207 - pixel_rate, 1, pixel_rate);
208 + v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE,
209 + sensor->pixel_rate, sensor->pixel_rate, 1,
210 + sensor->pixel_rate);
211
212 sensor->hflip = v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops,
213 V4L2_CID_HFLIP, 0, 1, 1, 0);
214 @@ -1410,6 +1389,17 @@ static int imx415_parse_hw_config(struct
215 "no valid sensor mode defined\n");
216 goto done_endpoint_free;
217 }
218 + switch (inck) {
219 + case 27000000:
220 + case 37125000:
221 + case 74250000:
222 + sensor->pixel_rate = IMX415_PIXEL_RATE_74_25MHZ;
223 + break;
224 + case 24000000:
225 + case 72000000:
226 + sensor->pixel_rate = IMX415_PIXEL_RATE_72MHZ;
227 + break;
228 + }
229
230 lane_rate = supported_modes[sensor->cur_mode].lane_rate;
231 for (i = 0; i < ARRAY_SIZE(imx415_clk_params); ++i) {
Staging tree of Linus Walleij