git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 6a325aed130bb68790e765f923e76ec5669d2da7 Mon Sep 17 00:00:00 2001
   2 From: Christian Marangi <ansuelsmth@gmail.com>
   3 Date: Thu, 10 Apr 2025 12:04:04 +0200
   4 Subject: [PATCH 2/2] net: phy: mediatek: add Airoha PHY ID to SoC driver
   5
   6 Airoha AN7581 SoC ship with a Switch based on the MT753x Switch embedded
   7 in other SoC like the MT7581 and the MT7988. Similar to these they
   8 require configuring some pin to enable LED PHYs.
   9
  10 Add support for the PHY ID for the Airoha embedded Switch and define a
  11 simple probe function to toggle these pins. Also fill the LED functions
  12 and add dedicated function to define LED polarity.
  13
  14 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  15 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  16 Link: https://patch.msgid.link/20250410100410.348-2-ansuelsmth@gmail.com
  17 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  18 ---
  19  drivers/net/phy/mediatek/Kconfig      |  4 +-
  20  drivers/net/phy/mediatek/mtk-ge-soc.c | 62 +++++++++++++++++++++++++++
  21  2 files changed, 65 insertions(+), 1 deletion(-)
  22
  23 --- a/drivers/net/phy/mediatek/Kconfig
  24 +++ b/drivers/net/phy/mediatek/Kconfig
  25 @@ -15,7 +15,9 @@ config MEDIATEK_GE_PHY
  26
  27  config MEDIATEK_GE_SOC_PHY
  28         tristate "MediaTek SoC Ethernet PHYs"
  29 -       depends on (ARM64 && ARCH_MEDIATEK && NVMEM_MTK_EFUSE) || COMPILE_TEST
  30 +       depends on ARM64 || COMPILE_TEST
  31 +       depends on ARCH_AIROHA || (ARCH_MEDIATEK && NVMEM_MTK_EFUSE) || \
  32 +                  COMPILE_TEST
  33         select MTK_NET_PHYLIB
  34         help
  35           Supports MediaTek SoC built-in Gigabit Ethernet PHYs.
  36 --- a/drivers/net/phy/mediatek/mtk-ge-soc.c
  37 +++ b/drivers/net/phy/mediatek/mtk-ge-soc.c
  38 @@ -10,8 +10,11 @@
  39
  40  #include "mtk.h"
  41
  42 +#define MTK_PHY_MAX_LEDS                       2
  43 +
  44  #define MTK_GPHY_ID_MT7981                     0x03a29461
  45  #define MTK_GPHY_ID_MT7988                     0x03a29481
  46 +#define MTK_GPHY_ID_AN7581                     0x03a294c1
  47
  48  #define MTK_EXT_PAGE_ACCESS                    0x1f
  49  #define MTK_PHY_PAGE_STANDARD                  0x0000
  50 @@ -1405,6 +1408,53 @@ static int mt7981_phy_probe(struct phy_d
  51         return mt798x_phy_calibration(phydev);
  52  }
  53
  54 +static int an7581_phy_probe(struct phy_device *phydev)
  55 +{
  56 +       struct mtk_socphy_priv *priv;
  57 +       struct pinctrl *pinctrl;
  58 +
  59 +       /* Toggle pinctrl to enable PHY LED */
  60 +       pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "gbe-led");
  61 +       if (IS_ERR(pinctrl))
  62 +               dev_err(&phydev->mdio.bus->dev,
  63 +                       "Failed to setup PHY LED pinctrl\n");
  64 +
  65 +       priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  66 +       if (!priv)
  67 +               return -ENOMEM;
  68 +
  69 +       phydev->priv = priv;
  70 +
  71 +       return 0;
  72 +}
  73 +
  74 +static int an7581_phy_led_polarity_set(struct phy_device *phydev, int index,
  75 +                                      unsigned long modes)
  76 +{
  77 +       u32 mode;
  78 +       u16 val;
  79 +
  80 +       if (index >= MTK_PHY_MAX_LEDS)
  81 +               return -EINVAL;
  82 +
  83 +       for_each_set_bit(mode, &modes, __PHY_LED_MODES_NUM) {
  84 +               switch (mode) {
  85 +               case PHY_LED_ACTIVE_LOW:
  86 +                       val = MTK_PHY_LED_ON_POLARITY;
  87 +                       break;
  88 +               case PHY_LED_ACTIVE_HIGH:
  89 +                       val = 0;
  90 +                       break;
  91 +               default:
  92 +                       return -EINVAL;
  93 +               }
  94 +       }
  95 +
  96 +       return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?
  97 +                             MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL,
  98 +                             MTK_PHY_LED_ON_POLARITY, val);
  99 +}
 100 +
 101  static struct phy_driver mtk_socphy_driver[] = {
 102         {
 103                 PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7981),
 104 @@ -1440,6 +1490,17 @@ static struct phy_driver mtk_socphy_driv
 105                 .led_hw_control_set = mt798x_phy_led_hw_control_set,
 106                 .led_hw_control_get = mt798x_phy_led_hw_control_get,
 107         },
 108 +       {
 109 +               PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7581),
 110 +               .name           = "Airoha AN7581 PHY",
 111 +               .probe          = an7581_phy_probe,
 112 +               .led_blink_set  = mt798x_phy_led_blink_set,
 113 +               .led_brightness_set = mt798x_phy_led_brightness_set,
 114 +               .led_hw_is_supported = mt798x_phy_led_hw_is_supported,
 115 +               .led_hw_control_set = mt798x_phy_led_hw_control_set,
 116 +               .led_hw_control_get = mt798x_phy_led_hw_control_get,
 117 +               .led_polarity_set = an7581_phy_led_polarity_set,
 118 +       },
 119  };
 120
 121  module_phy_driver(mtk_socphy_driver);
 122 @@ -1447,6 +1508,7 @@ module_phy_driver(mtk_socphy_driver);
 123  static struct mdio_device_id __maybe_unused mtk_socphy_tbl[] = {
 124         { PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7981) },
 125         { PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7988) },
 126 +       { PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7581) },
 127         { }
 128  };
 129