60c2b269b50074963008edb014a4116743b63571
[openwrt/staging/pepe2k.git] /
1 From 9918d10d16665527e59fdb87c5acac70cc1cfe8f Mon Sep 17 00:00:00 2001
2 From: Heiko Stuebner <heiko.stuebner@cherry.de>
3 Date: Tue, 5 Dec 2023 17:48:39 +0100
4 Subject: [PATCH] arm64: dts: rockchip: move rk3588 serial aliases to soc dtsi
5
6 The serial ports on rk3588 are named uart0 - uart9. Board schematics
7 also use these exact numbers and we want those names to also reflect
8 in the OS devices because everything else would just cause confusion.
9
10 To prevent each board repeating their list of serial aliases, move them
11 to the soc dtsi, as all previous Rockchip soc do already.
12
13 Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
14 Reviewed-by: Dragan Simic <dsimic@manjaro.org>
15 Link: https://lore.kernel.org/r/20231205164842.556684-2-heiko@sntech.de
16 ---
17 .../boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts | 4 ----
18 .../boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts | 4 ----
19 arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 1 -
20 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 1 -
21 .../boot/dts/rockchip/rk3588-orangepi-5-plus.dts | 1 -
22 arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 1 -
23 arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 1 -
24 arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi | 2 --
25 .../boot/dts/rockchip/rk3588s-indiedroid-nova.dts | 1 -
26 .../boot/dts/rockchip/rk3588s-khadas-edge2.dts | 1 -
27 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts | 1 -
28 arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 1 -
29 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 13 +++++++++++++
30 13 files changed, 13 insertions(+), 19 deletions(-)
31
32 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts
33 +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts
34 @@ -12,10 +12,6 @@
35 compatible = "edgeble,neural-compute-module-6a-io",
36 "edgeble,neural-compute-module-6a", "rockchip,rk3588";
37
38 - aliases {
39 - serial2 = &uart2;
40 - };
41 -
42 chosen {
43 stdout-path = "serial2:1500000n8";
44 };
45 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
46 +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts
47 @@ -12,10 +12,6 @@
48 compatible = "edgeble,neural-compute-module-6b-io",
49 "edgeble,neural-compute-module-6b", "rockchip,rk3588";
50
51 - aliases {
52 - serial2 = &uart2;
53 - };
54 -
55 chosen {
56 stdout-path = "serial2:1500000n8";
57 };
58 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
59 +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
60 @@ -16,7 +16,6 @@
61
62 aliases {
63 mmc0 = &sdhci;
64 - serial2 = &uart2;
65 };
66
67 chosen {
68 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
69 +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts
70 @@ -19,7 +19,6 @@
71 aliases {
72 mmc0 = &sdhci;
73 mmc1 = &sdmmc;
74 - serial2 = &uart2;
75 };
76
77 chosen {
78 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
79 +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
80 @@ -12,7 +12,6 @@
81 aliases {
82 mmc0 = &sdhci;
83 mmc1 = &sdmmc;
84 - serial2 = &uart2;
85 };
86
87 chosen {
88 --- a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
89 +++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
90 @@ -15,7 +15,6 @@
91 mmc0 = &sdhci;
92 mmc1 = &sdmmc;
93 mmc2 = &sdio;
94 - serial2 = &uart2;
95 };
96
97 chosen {
98 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
99 +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
100 @@ -12,7 +12,6 @@
101
102 aliases {
103 mmc0 = &sdhci;
104 - serial2 = &uart2;
105 };
106
107 chosen {
108 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
109 +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
110 @@ -14,7 +14,6 @@
111 aliases {
112 mmc0 = &sdhci;
113 mmc1 = &sdmmc;
114 - serial2 = &uart2;
115 };
116
117 analog-sound {
118 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
119 +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
120 @@ -18,6 +18,19 @@
121 #address-cells = <2>;
122 #size-cells = <2>;
123
124 + aliases {
125 + serial0 = &uart0;
126 + serial1 = &uart1;
127 + serial2 = &uart2;
128 + serial3 = &uart3;
129 + serial4 = &uart4;
130 + serial5 = &uart5;
131 + serial6 = &uart6;
132 + serial7 = &uart7;
133 + serial8 = &uart8;
134 + serial9 = &uart9;
135 + };
136 +
137 cpus {
138 #address-cells = <1>;
139 #size-cells = <0>;