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1 From 7f9c320c98dbca18934afa80306015eb71c05a6c Mon Sep 17 00:00:00 2001
2 From: "SkyLake.Huang" <skylake.huang@mediatek.com>
3 Date: Sat, 9 Nov 2024 00:34:52 +0800
4 Subject: [PATCH] net: phy: mediatek: Move LED helper functions into mtk phy
5 lib
6
7 This patch creates mtk-phy-lib.c & mtk-phy.h and integrates mtk-ge-soc.c's
8 LED helper functions so that we can use those helper functions in other
9 MTK's ethernet phy driver.
10
11 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
12 Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
13 Signed-off-by: David S. Miller <davem@davemloft.net>
14 ---
15 MAINTAINERS | 2 +
16 drivers/net/phy/mediatek/Kconfig | 4 +
17 drivers/net/phy/mediatek/Makefile | 1 +
18 drivers/net/phy/mediatek/mtk-ge-soc.c | 280 +++----------------------
19 drivers/net/phy/mediatek/mtk-phy-lib.c | 254 ++++++++++++++++++++++
20 drivers/net/phy/mediatek/mtk.h | 86 ++++++++
21 6 files changed, 372 insertions(+), 255 deletions(-)
22 create mode 100644 drivers/net/phy/mediatek/mtk-phy-lib.c
23 create mode 100644 drivers/net/phy/mediatek/mtk.h
24
25 --- a/drivers/net/phy/mediatek/Kconfig
26 +++ b/drivers/net/phy/mediatek/Kconfig
27 @@ -1,4 +1,7 @@
28 # SPDX-License-Identifier: GPL-2.0-only
29 +config MTK_NET_PHYLIB
30 + tristate
31 +
32 config MEDIATEK_GE_PHY
33 tristate "MediaTek Gigabit Ethernet PHYs"
34 help
35 @@ -13,6 +16,7 @@ config MEDIATEK_GE_SOC_PHY
36 tristate "MediaTek SoC Ethernet PHYs"
37 depends on (ARM64 && ARCH_MEDIATEK) || COMPILE_TEST
38 depends on NVMEM_MTK_EFUSE
39 + select MTK_NET_PHYLIB
40 help
41 Supports MediaTek SoC built-in Gigabit Ethernet PHYs.
42
43 --- a/drivers/net/phy/mediatek/Makefile
44 +++ b/drivers/net/phy/mediatek/Makefile
45 @@ -1,3 +1,4 @@
46 # SPDX-License-Identifier: GPL-2.0
47 +obj-$(CONFIG_MTK_NET_PHYLIB) += mtk-phy-lib.o
48 obj-$(CONFIG_MEDIATEK_GE_PHY) += mtk-ge.o
49 obj-$(CONFIG_MEDIATEK_GE_SOC_PHY) += mtk-ge-soc.o
50 --- a/drivers/net/phy/mediatek/mtk-ge-soc.c
51 +++ b/drivers/net/phy/mediatek/mtk-ge-soc.c
52 @@ -8,6 +8,8 @@
53 #include <linux/phy.h>
54 #include <linux/regmap.h>
55
56 +#include "mtk.h"
57 +
58 #define MTK_GPHY_ID_MT7981 0x03a29461
59 #define MTK_GPHY_ID_MT7988 0x03a29481
60
61 @@ -210,41 +212,6 @@
62 #define MTK_PHY_DA_TX_R50_PAIR_D 0x540
63
64 /* Registers on MDIO_MMD_VEND2 */
65 -#define MTK_PHY_LED0_ON_CTRL 0x24
66 -#define MTK_PHY_LED1_ON_CTRL 0x26
67 -#define MTK_PHY_LED_ON_MASK GENMASK(6, 0)
68 -#define MTK_PHY_LED_ON_LINK1000 BIT(0)
69 -#define MTK_PHY_LED_ON_LINK100 BIT(1)
70 -#define MTK_PHY_LED_ON_LINK10 BIT(2)
71 -#define MTK_PHY_LED_ON_LINK (MTK_PHY_LED_ON_LINK10 |\
72 - MTK_PHY_LED_ON_LINK100 |\
73 - MTK_PHY_LED_ON_LINK1000)
74 -#define MTK_PHY_LED_ON_LINKDOWN BIT(3)
75 -#define MTK_PHY_LED_ON_FDX BIT(4) /* Full duplex */
76 -#define MTK_PHY_LED_ON_HDX BIT(5) /* Half duplex */
77 -#define MTK_PHY_LED_ON_FORCE_ON BIT(6)
78 -#define MTK_PHY_LED_ON_POLARITY BIT(14)
79 -#define MTK_PHY_LED_ON_ENABLE BIT(15)
80 -
81 -#define MTK_PHY_LED0_BLINK_CTRL 0x25
82 -#define MTK_PHY_LED1_BLINK_CTRL 0x27
83 -#define MTK_PHY_LED_BLINK_1000TX BIT(0)
84 -#define MTK_PHY_LED_BLINK_1000RX BIT(1)
85 -#define MTK_PHY_LED_BLINK_100TX BIT(2)
86 -#define MTK_PHY_LED_BLINK_100RX BIT(3)
87 -#define MTK_PHY_LED_BLINK_10TX BIT(4)
88 -#define MTK_PHY_LED_BLINK_10RX BIT(5)
89 -#define MTK_PHY_LED_BLINK_RX (MTK_PHY_LED_BLINK_10RX |\
90 - MTK_PHY_LED_BLINK_100RX |\
91 - MTK_PHY_LED_BLINK_1000RX)
92 -#define MTK_PHY_LED_BLINK_TX (MTK_PHY_LED_BLINK_10TX |\
93 - MTK_PHY_LED_BLINK_100TX |\
94 - MTK_PHY_LED_BLINK_1000TX)
95 -#define MTK_PHY_LED_BLINK_COLLISION BIT(6)
96 -#define MTK_PHY_LED_BLINK_RX_CRC_ERR BIT(7)
97 -#define MTK_PHY_LED_BLINK_RX_IDLE_ERR BIT(8)
98 -#define MTK_PHY_LED_BLINK_FORCE_BLINK BIT(9)
99 -
100 #define MTK_PHY_LED1_DEFAULT_POLARITIES BIT(1)
101
102 #define MTK_PHY_RG_BG_RASEL 0x115
103 @@ -299,14 +266,6 @@ enum CAL_MODE {
104 SW_M
105 };
106
107 -#define MTK_PHY_LED_STATE_FORCE_ON 0
108 -#define MTK_PHY_LED_STATE_FORCE_BLINK 1
109 -#define MTK_PHY_LED_STATE_NETDEV 2
110 -
111 -struct mtk_socphy_priv {
112 - unsigned long led_state;
113 -};
114 -
115 struct mtk_socphy_shared {
116 u32 boottrap;
117 struct mtk_socphy_priv priv[4];
118 @@ -1172,76 +1131,23 @@ static int mt798x_phy_config_init(struct
119 return mt798x_phy_calibration(phydev);
120 }
121
122 -static int mt798x_phy_hw_led_on_set(struct phy_device *phydev, u8 index,
123 - bool on)
124 -{
125 - unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);
126 - struct mtk_socphy_priv *priv = phydev->priv;
127 - bool changed;
128 -
129 - if (on)
130 - changed = !test_and_set_bit(bit_on, &priv->led_state);
131 - else
132 - changed = !!test_and_clear_bit(bit_on, &priv->led_state);
133 -
134 - changed |= !!test_and_clear_bit(MTK_PHY_LED_STATE_NETDEV +
135 - (index ? 16 : 0), &priv->led_state);
136 - if (changed)
137 - return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?
138 - MTK_PHY_LED1_ON_CTRL :
139 - MTK_PHY_LED0_ON_CTRL,
140 - MTK_PHY_LED_ON_MASK,
141 - on ? MTK_PHY_LED_ON_FORCE_ON : 0);
142 - else
143 - return 0;
144 -}
145 -
146 -static int mt798x_phy_hw_led_blink_set(struct phy_device *phydev, u8 index,
147 - bool blinking)
148 -{
149 - unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +
150 - (index ? 16 : 0);
151 - struct mtk_socphy_priv *priv = phydev->priv;
152 - bool changed;
153 -
154 - if (blinking)
155 - changed = !test_and_set_bit(bit_blink, &priv->led_state);
156 - else
157 - changed = !!test_and_clear_bit(bit_blink, &priv->led_state);
158 -
159 - changed |= !!test_bit(MTK_PHY_LED_STATE_NETDEV +
160 - (index ? 16 : 0), &priv->led_state);
161 - if (changed)
162 - return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?
163 - MTK_PHY_LED1_BLINK_CTRL :
164 - MTK_PHY_LED0_BLINK_CTRL,
165 - blinking ?
166 - MTK_PHY_LED_BLINK_FORCE_BLINK : 0);
167 - else
168 - return 0;
169 -}
170 -
171 static int mt798x_phy_led_blink_set(struct phy_device *phydev, u8 index,
172 unsigned long *delay_on,
173 unsigned long *delay_off)
174 {
175 bool blinking = false;
176 - int err = 0;
177 -
178 - if (index > 1)
179 - return -EINVAL;
180 + int err;
181
182 - if (delay_on && delay_off && (*delay_on > 0) && (*delay_off > 0)) {
183 - blinking = true;
184 - *delay_on = 50;
185 - *delay_off = 50;
186 - }
187 + err = mtk_phy_led_num_dly_cfg(index, delay_on, delay_off, &blinking);
188 + if (err < 0)
189 + return err;
190
191 - err = mt798x_phy_hw_led_blink_set(phydev, index, blinking);
192 + err = mtk_phy_hw_led_blink_set(phydev, index, blinking);
193 if (err)
194 return err;
195
196 - return mt798x_phy_hw_led_on_set(phydev, index, false);
197 + return mtk_phy_hw_led_on_set(phydev, index, MTK_GPHY_LED_ON_MASK,
198 + false);
199 }
200
201 static int mt798x_phy_led_brightness_set(struct phy_device *phydev,
202 @@ -1249,11 +1155,12 @@ static int mt798x_phy_led_brightness_set
203 {
204 int err;
205
206 - err = mt798x_phy_hw_led_blink_set(phydev, index, false);
207 + err = mtk_phy_hw_led_blink_set(phydev, index, false);
208 if (err)
209 return err;
210
211 - return mt798x_phy_hw_led_on_set(phydev, index, (value != LED_OFF));
212 + return mtk_phy_hw_led_on_set(phydev, index, MTK_GPHY_LED_ON_MASK,
213 + (value != LED_OFF));
214 }
215
216 static const unsigned long supported_triggers =
217 @@ -1269,155 +1176,26 @@ static const unsigned long supported_tri
218 static int mt798x_phy_led_hw_is_supported(struct phy_device *phydev, u8 index,
219 unsigned long rules)
220 {
221 - if (index > 1)
222 - return -EINVAL;
223 -
224 - /* All combinations of the supported triggers are allowed */
225 - if (rules & ~supported_triggers)
226 - return -EOPNOTSUPP;
227 -
228 - return 0;
229 -};
230 + return mtk_phy_led_hw_is_supported(phydev, index, rules,
231 + supported_triggers);
232 +}
233
234 static int mt798x_phy_led_hw_control_get(struct phy_device *phydev, u8 index,
235 unsigned long *rules)
236 {
237 - unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +
238 - (index ? 16 : 0);
239 - unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);
240 - unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);
241 - struct mtk_socphy_priv *priv = phydev->priv;
242 - int on, blink;
243 -
244 - if (index > 1)
245 - return -EINVAL;
246 -
247 - on = phy_read_mmd(phydev, MDIO_MMD_VEND2,
248 - index ? MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL);
249 -
250 - if (on < 0)
251 - return -EIO;
252 -
253 - blink = phy_read_mmd(phydev, MDIO_MMD_VEND2,
254 - index ? MTK_PHY_LED1_BLINK_CTRL :
255 - MTK_PHY_LED0_BLINK_CTRL);
256 - if (blink < 0)
257 - return -EIO;
258 -
259 - if ((on & (MTK_PHY_LED_ON_LINK | MTK_PHY_LED_ON_FDX |
260 - MTK_PHY_LED_ON_HDX | MTK_PHY_LED_ON_LINKDOWN)) ||
261 - (blink & (MTK_PHY_LED_BLINK_RX | MTK_PHY_LED_BLINK_TX)))
262 - set_bit(bit_netdev, &priv->led_state);
263 - else
264 - clear_bit(bit_netdev, &priv->led_state);
265 -
266 - if (on & MTK_PHY_LED_ON_FORCE_ON)
267 - set_bit(bit_on, &priv->led_state);
268 - else
269 - clear_bit(bit_on, &priv->led_state);
270 -
271 - if (blink & MTK_PHY_LED_BLINK_FORCE_BLINK)
272 - set_bit(bit_blink, &priv->led_state);
273 - else
274 - clear_bit(bit_blink, &priv->led_state);
275 -
276 - if (!rules)
277 - return 0;
278 -
279 - if (on & MTK_PHY_LED_ON_LINK)
280 - *rules |= BIT(TRIGGER_NETDEV_LINK);
281 -
282 - if (on & MTK_PHY_LED_ON_LINK10)
283 - *rules |= BIT(TRIGGER_NETDEV_LINK_10);
284 -
285 - if (on & MTK_PHY_LED_ON_LINK100)
286 - *rules |= BIT(TRIGGER_NETDEV_LINK_100);
287 -
288 - if (on & MTK_PHY_LED_ON_LINK1000)
289 - *rules |= BIT(TRIGGER_NETDEV_LINK_1000);
290 -
291 - if (on & MTK_PHY_LED_ON_FDX)
292 - *rules |= BIT(TRIGGER_NETDEV_FULL_DUPLEX);
293 -
294 - if (on & MTK_PHY_LED_ON_HDX)
295 - *rules |= BIT(TRIGGER_NETDEV_HALF_DUPLEX);
296 -
297 - if (blink & MTK_PHY_LED_BLINK_RX)
298 - *rules |= BIT(TRIGGER_NETDEV_RX);
299 -
300 - if (blink & MTK_PHY_LED_BLINK_TX)
301 - *rules |= BIT(TRIGGER_NETDEV_TX);
302 -
303 - return 0;
304 + return mtk_phy_led_hw_ctrl_get(phydev, index, rules,
305 + MTK_GPHY_LED_ON_SET,
306 + MTK_GPHY_LED_RX_BLINK_SET,
307 + MTK_GPHY_LED_TX_BLINK_SET);
308 };
309
310 static int mt798x_phy_led_hw_control_set(struct phy_device *phydev, u8 index,
311 unsigned long rules)
312 {
313 - unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);
314 - struct mtk_socphy_priv *priv = phydev->priv;
315 - u16 on = 0, blink = 0;
316 - int ret;
317 -
318 - if (index > 1)
319 - return -EINVAL;
320 -
321 - if (rules & BIT(TRIGGER_NETDEV_FULL_DUPLEX))
322 - on |= MTK_PHY_LED_ON_FDX;
323 -
324 - if (rules & BIT(TRIGGER_NETDEV_HALF_DUPLEX))
325 - on |= MTK_PHY_LED_ON_HDX;
326 -
327 - if (rules & (BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK)))
328 - on |= MTK_PHY_LED_ON_LINK10;
329 -
330 - if (rules & (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK)))
331 - on |= MTK_PHY_LED_ON_LINK100;
332 -
333 - if (rules & (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK)))
334 - on |= MTK_PHY_LED_ON_LINK1000;
335 -
336 - if (rules & BIT(TRIGGER_NETDEV_RX)) {
337 - blink |= (on & MTK_PHY_LED_ON_LINK) ?
338 - (((on & MTK_PHY_LED_ON_LINK10) ?
339 - MTK_PHY_LED_BLINK_10RX : 0) |
340 - ((on & MTK_PHY_LED_ON_LINK100) ?
341 - MTK_PHY_LED_BLINK_100RX : 0) |
342 - ((on & MTK_PHY_LED_ON_LINK1000) ?
343 - MTK_PHY_LED_BLINK_1000RX : 0)) :
344 - MTK_PHY_LED_BLINK_RX;
345 - }
346 -
347 - if (rules & BIT(TRIGGER_NETDEV_TX)) {
348 - blink |= (on & MTK_PHY_LED_ON_LINK) ?
349 - (((on & MTK_PHY_LED_ON_LINK10) ?
350 - MTK_PHY_LED_BLINK_10TX : 0) |
351 - ((on & MTK_PHY_LED_ON_LINK100) ?
352 - MTK_PHY_LED_BLINK_100TX : 0) |
353 - ((on & MTK_PHY_LED_ON_LINK1000) ?
354 - MTK_PHY_LED_BLINK_1000TX : 0)) :
355 - MTK_PHY_LED_BLINK_TX;
356 - }
357 -
358 - if (blink || on)
359 - set_bit(bit_netdev, &priv->led_state);
360 - else
361 - clear_bit(bit_netdev, &priv->led_state);
362 -
363 - ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?
364 - MTK_PHY_LED1_ON_CTRL :
365 - MTK_PHY_LED0_ON_CTRL,
366 - MTK_PHY_LED_ON_FDX |
367 - MTK_PHY_LED_ON_HDX |
368 - MTK_PHY_LED_ON_LINK,
369 - on);
370 -
371 - if (ret)
372 - return ret;
373 -
374 - return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?
375 - MTK_PHY_LED1_BLINK_CTRL :
376 - MTK_PHY_LED0_BLINK_CTRL, blink);
377 + return mtk_phy_led_hw_ctrl_set(phydev, index, rules,
378 + MTK_GPHY_LED_ON_SET,
379 + MTK_GPHY_LED_RX_BLINK_SET,
380 + MTK_GPHY_LED_TX_BLINK_SET);
381 };
382
383 static bool mt7988_phy_led_get_polarity(struct phy_device *phydev, int led_num)
384 @@ -1492,14 +1270,6 @@ static int mt7988_phy_probe_shared(struc
385 return 0;
386 }
387
388 -static void mt798x_phy_leds_state_init(struct phy_device *phydev)
389 -{
390 - int i;
391 -
392 - for (i = 0; i < 2; ++i)
393 - mt798x_phy_led_hw_control_get(phydev, i, NULL);
394 -}
395 -
396 static int mt7988_phy_probe(struct phy_device *phydev)
397 {
398 struct mtk_socphy_shared *shared;
399 @@ -1525,7 +1295,7 @@ static int mt7988_phy_probe(struct phy_d
400
401 phydev->priv = priv;
402
403 - mt798x_phy_leds_state_init(phydev);
404 + mtk_phy_leds_state_init(phydev);
405
406 err = mt7988_phy_fix_leds_polarities(phydev);
407 if (err)
408 @@ -1552,7 +1322,7 @@ static int mt7981_phy_probe(struct phy_d
409
410 phydev->priv = priv;
411
412 - mt798x_phy_leds_state_init(phydev);
413 + mtk_phy_leds_state_init(phydev);
414
415 return mt798x_phy_calibration(phydev);
416 }
417 --- /dev/null
418 +++ b/drivers/net/phy/mediatek/mtk-phy-lib.c
419 @@ -0,0 +1,254 @@
420 +// SPDX-License-Identifier: GPL-2.0
421 +#include <linux/phy.h>
422 +#include <linux/module.h>
423 +
424 +#include <linux/netdevice.h>
425 +
426 +#include "mtk.h"
427 +
428 +int mtk_phy_led_hw_is_supported(struct phy_device *phydev, u8 index,
429 + unsigned long rules,
430 + unsigned long supported_triggers)
431 +{
432 + if (index > 1)
433 + return -EINVAL;
434 +
435 + /* All combinations of the supported triggers are allowed */
436 + if (rules & ~supported_triggers)
437 + return -EOPNOTSUPP;
438 +
439 + return 0;
440 +}
441 +EXPORT_SYMBOL_GPL(mtk_phy_led_hw_is_supported);
442 +
443 +int mtk_phy_led_hw_ctrl_get(struct phy_device *phydev, u8 index,
444 + unsigned long *rules, u16 on_set,
445 + u16 rx_blink_set, u16 tx_blink_set)
446 +{
447 + unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +
448 + (index ? 16 : 0);
449 + unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);
450 + unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);
451 + struct mtk_socphy_priv *priv = phydev->priv;
452 + int on, blink;
453 +
454 + if (index > 1)
455 + return -EINVAL;
456 +
457 + on = phy_read_mmd(phydev, MDIO_MMD_VEND2,
458 + index ? MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL);
459 +
460 + if (on < 0)
461 + return -EIO;
462 +
463 + blink = phy_read_mmd(phydev, MDIO_MMD_VEND2,
464 + index ? MTK_PHY_LED1_BLINK_CTRL :
465 + MTK_PHY_LED0_BLINK_CTRL);
466 + if (blink < 0)
467 + return -EIO;
468 +
469 + if ((on & (on_set | MTK_PHY_LED_ON_FDX |
470 + MTK_PHY_LED_ON_HDX | MTK_PHY_LED_ON_LINKDOWN)) ||
471 + (blink & (rx_blink_set | tx_blink_set)))
472 + set_bit(bit_netdev, &priv->led_state);
473 + else
474 + clear_bit(bit_netdev, &priv->led_state);
475 +
476 + if (on & MTK_PHY_LED_ON_FORCE_ON)
477 + set_bit(bit_on, &priv->led_state);
478 + else
479 + clear_bit(bit_on, &priv->led_state);
480 +
481 + if (blink & MTK_PHY_LED_BLINK_FORCE_BLINK)
482 + set_bit(bit_blink, &priv->led_state);
483 + else
484 + clear_bit(bit_blink, &priv->led_state);
485 +
486 + if (!rules)
487 + return 0;
488 +
489 + if (on & on_set)
490 + *rules |= BIT(TRIGGER_NETDEV_LINK);
491 +
492 + if (on & MTK_PHY_LED_ON_LINK10)
493 + *rules |= BIT(TRIGGER_NETDEV_LINK_10);
494 +
495 + if (on & MTK_PHY_LED_ON_LINK100)
496 + *rules |= BIT(TRIGGER_NETDEV_LINK_100);
497 +
498 + if (on & MTK_PHY_LED_ON_LINK1000)
499 + *rules |= BIT(TRIGGER_NETDEV_LINK_1000);
500 +
501 + if (on & MTK_PHY_LED_ON_LINK2500)
502 + *rules |= BIT(TRIGGER_NETDEV_LINK_2500);
503 +
504 + if (on & MTK_PHY_LED_ON_FDX)
505 + *rules |= BIT(TRIGGER_NETDEV_FULL_DUPLEX);
506 +
507 + if (on & MTK_PHY_LED_ON_HDX)
508 + *rules |= BIT(TRIGGER_NETDEV_HALF_DUPLEX);
509 +
510 + if (blink & rx_blink_set)
511 + *rules |= BIT(TRIGGER_NETDEV_RX);
512 +
513 + if (blink & tx_blink_set)
514 + *rules |= BIT(TRIGGER_NETDEV_TX);
515 +
516 + return 0;
517 +}
518 +EXPORT_SYMBOL_GPL(mtk_phy_led_hw_ctrl_get);
519 +
520 +int mtk_phy_led_hw_ctrl_set(struct phy_device *phydev, u8 index,
521 + unsigned long rules, u16 on_set,
522 + u16 rx_blink_set, u16 tx_blink_set)
523 +{
524 + unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);
525 + struct mtk_socphy_priv *priv = phydev->priv;
526 + u16 on = 0, blink = 0;
527 + int ret;
528 +
529 + if (index > 1)
530 + return -EINVAL;
531 +
532 + if (rules & BIT(TRIGGER_NETDEV_FULL_DUPLEX))
533 + on |= MTK_PHY_LED_ON_FDX;
534 +
535 + if (rules & BIT(TRIGGER_NETDEV_HALF_DUPLEX))
536 + on |= MTK_PHY_LED_ON_HDX;
537 +
538 + if (rules & (BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK)))
539 + on |= MTK_PHY_LED_ON_LINK10;
540 +
541 + if (rules & (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK)))
542 + on |= MTK_PHY_LED_ON_LINK100;
543 +
544 + if (rules & (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK)))
545 + on |= MTK_PHY_LED_ON_LINK1000;
546 +
547 + if (rules & (BIT(TRIGGER_NETDEV_LINK_2500) | BIT(TRIGGER_NETDEV_LINK)))
548 + on |= MTK_PHY_LED_ON_LINK2500;
549 +
550 + if (rules & BIT(TRIGGER_NETDEV_RX)) {
551 + blink |= (on & on_set) ?
552 + (((on & MTK_PHY_LED_ON_LINK10) ?
553 + MTK_PHY_LED_BLINK_10RX : 0) |
554 + ((on & MTK_PHY_LED_ON_LINK100) ?
555 + MTK_PHY_LED_BLINK_100RX : 0) |
556 + ((on & MTK_PHY_LED_ON_LINK1000) ?
557 + MTK_PHY_LED_BLINK_1000RX : 0) |
558 + ((on & MTK_PHY_LED_ON_LINK2500) ?
559 + MTK_PHY_LED_BLINK_2500RX : 0)) :
560 + rx_blink_set;
561 + }
562 +
563 + if (rules & BIT(TRIGGER_NETDEV_TX)) {
564 + blink |= (on & on_set) ?
565 + (((on & MTK_PHY_LED_ON_LINK10) ?
566 + MTK_PHY_LED_BLINK_10TX : 0) |
567 + ((on & MTK_PHY_LED_ON_LINK100) ?
568 + MTK_PHY_LED_BLINK_100TX : 0) |
569 + ((on & MTK_PHY_LED_ON_LINK1000) ?
570 + MTK_PHY_LED_BLINK_1000TX : 0) |
571 + ((on & MTK_PHY_LED_ON_LINK2500) ?
572 + MTK_PHY_LED_BLINK_2500TX : 0)) :
573 + tx_blink_set;
574 + }
575 +
576 + if (blink || on)
577 + set_bit(bit_netdev, &priv->led_state);
578 + else
579 + clear_bit(bit_netdev, &priv->led_state);
580 +
581 + ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?
582 + MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL,
583 + MTK_PHY_LED_ON_FDX | MTK_PHY_LED_ON_HDX | on_set,
584 + on);
585 +
586 + if (ret)
587 + return ret;
588 +
589 + return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?
590 + MTK_PHY_LED1_BLINK_CTRL :
591 + MTK_PHY_LED0_BLINK_CTRL, blink);
592 +}
593 +EXPORT_SYMBOL_GPL(mtk_phy_led_hw_ctrl_set);
594 +
595 +int mtk_phy_led_num_dly_cfg(u8 index, unsigned long *delay_on,
596 + unsigned long *delay_off, bool *blinking)
597 +{
598 + if (index > 1)
599 + return -EINVAL;
600 +
601 + if (delay_on && delay_off && (*delay_on > 0) && (*delay_off > 0)) {
602 + *blinking = true;
603 + *delay_on = 50;
604 + *delay_off = 50;
605 + }
606 +
607 + return 0;
608 +}
609 +EXPORT_SYMBOL_GPL(mtk_phy_led_num_dly_cfg);
610 +
611 +int mtk_phy_hw_led_on_set(struct phy_device *phydev, u8 index,
612 + u16 led_on_mask, bool on)
613 +{
614 + unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);
615 + struct mtk_socphy_priv *priv = phydev->priv;
616 + bool changed;
617 +
618 + if (on)
619 + changed = !test_and_set_bit(bit_on, &priv->led_state);
620 + else
621 + changed = !!test_and_clear_bit(bit_on, &priv->led_state);
622 +
623 + changed |= !!test_and_clear_bit(MTK_PHY_LED_STATE_NETDEV +
624 + (index ? 16 : 0), &priv->led_state);
625 + if (changed)
626 + return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?
627 + MTK_PHY_LED1_ON_CTRL :
628 + MTK_PHY_LED0_ON_CTRL,
629 + led_on_mask,
630 + on ? MTK_PHY_LED_ON_FORCE_ON : 0);
631 + else
632 + return 0;
633 +}
634 +EXPORT_SYMBOL_GPL(mtk_phy_hw_led_on_set);
635 +
636 +int mtk_phy_hw_led_blink_set(struct phy_device *phydev, u8 index, bool blinking)
637 +{
638 + unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +
639 + (index ? 16 : 0);
640 + struct mtk_socphy_priv *priv = phydev->priv;
641 + bool changed;
642 +
643 + if (blinking)
644 + changed = !test_and_set_bit(bit_blink, &priv->led_state);
645 + else
646 + changed = !!test_and_clear_bit(bit_blink, &priv->led_state);
647 +
648 + changed |= !!test_bit(MTK_PHY_LED_STATE_NETDEV +
649 + (index ? 16 : 0), &priv->led_state);
650 + if (changed)
651 + return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?
652 + MTK_PHY_LED1_BLINK_CTRL :
653 + MTK_PHY_LED0_BLINK_CTRL,
654 + blinking ?
655 + MTK_PHY_LED_BLINK_FORCE_BLINK : 0);
656 + else
657 + return 0;
658 +}
659 +EXPORT_SYMBOL_GPL(mtk_phy_hw_led_blink_set);
660 +
661 +void mtk_phy_leds_state_init(struct phy_device *phydev)
662 +{
663 + int i;
664 +
665 + for (i = 0; i < 2; ++i)
666 + phydev->drv->led_hw_control_get(phydev, i, NULL);
667 +}
668 +EXPORT_SYMBOL_GPL(mtk_phy_leds_state_init);
669 +
670 +MODULE_DESCRIPTION("MediaTek Ethernet PHY driver common");
671 +MODULE_AUTHOR("Sky Huang <SkyLake.Huang@mediatek.com>");
672 +MODULE_AUTHOR("Daniel Golle <daniel@makrotopia.org>");
673 +MODULE_LICENSE("GPL");
674 --- /dev/null
675 +++ b/drivers/net/phy/mediatek/mtk.h
676 @@ -0,0 +1,86 @@
677 +/* SPDX-License-Identifier: GPL-2.0
678 + *
679 + * Common definition for Mediatek Ethernet PHYs
680 + * Author: SkyLake Huang <SkyLake.Huang@mediatek.com>
681 + * Copyright (c) 2024 MediaTek Inc.
682 + */
683 +
684 +#ifndef _MTK_EPHY_H_
685 +#define _MTK_EPHY_H_
686 +
687 +#define MTK_EXT_PAGE_ACCESS 0x1f
688 +
689 +/* Registers on MDIO_MMD_VEND2 */
690 +#define MTK_PHY_LED0_ON_CTRL 0x24
691 +#define MTK_PHY_LED1_ON_CTRL 0x26
692 +#define MTK_GPHY_LED_ON_MASK GENMASK(6, 0)
693 +#define MTK_2P5GPHY_LED_ON_MASK GENMASK(7, 0)
694 +#define MTK_PHY_LED_ON_LINK1000 BIT(0)
695 +#define MTK_PHY_LED_ON_LINK100 BIT(1)
696 +#define MTK_PHY_LED_ON_LINK10 BIT(2)
697 +#define MTK_PHY_LED_ON_LINKDOWN BIT(3)
698 +#define MTK_PHY_LED_ON_FDX BIT(4) /* Full duplex */
699 +#define MTK_PHY_LED_ON_HDX BIT(5) /* Half duplex */
700 +#define MTK_PHY_LED_ON_FORCE_ON BIT(6)
701 +#define MTK_PHY_LED_ON_LINK2500 BIT(7)
702 +#define MTK_PHY_LED_ON_POLARITY BIT(14)
703 +#define MTK_PHY_LED_ON_ENABLE BIT(15)
704 +
705 +#define MTK_PHY_LED0_BLINK_CTRL 0x25
706 +#define MTK_PHY_LED1_BLINK_CTRL 0x27
707 +#define MTK_PHY_LED_BLINK_1000TX BIT(0)
708 +#define MTK_PHY_LED_BLINK_1000RX BIT(1)
709 +#define MTK_PHY_LED_BLINK_100TX BIT(2)
710 +#define MTK_PHY_LED_BLINK_100RX BIT(3)
711 +#define MTK_PHY_LED_BLINK_10TX BIT(4)
712 +#define MTK_PHY_LED_BLINK_10RX BIT(5)
713 +#define MTK_PHY_LED_BLINK_COLLISION BIT(6)
714 +#define MTK_PHY_LED_BLINK_RX_CRC_ERR BIT(7)
715 +#define MTK_PHY_LED_BLINK_RX_IDLE_ERR BIT(8)
716 +#define MTK_PHY_LED_BLINK_FORCE_BLINK BIT(9)
717 +#define MTK_PHY_LED_BLINK_2500TX BIT(10)
718 +#define MTK_PHY_LED_BLINK_2500RX BIT(11)
719 +
720 +#define MTK_GPHY_LED_ON_SET (MTK_PHY_LED_ON_LINK1000 | \
721 + MTK_PHY_LED_ON_LINK100 | \
722 + MTK_PHY_LED_ON_LINK10)
723 +#define MTK_GPHY_LED_RX_BLINK_SET (MTK_PHY_LED_BLINK_1000RX | \
724 + MTK_PHY_LED_BLINK_100RX | \
725 + MTK_PHY_LED_BLINK_10RX)
726 +#define MTK_GPHY_LED_TX_BLINK_SET (MTK_PHY_LED_BLINK_1000RX | \
727 + MTK_PHY_LED_BLINK_100RX | \
728 + MTK_PHY_LED_BLINK_10RX)
729 +
730 +#define MTK_2P5GPHY_LED_ON_SET (MTK_PHY_LED_ON_LINK2500 | \
731 + MTK_GPHY_LED_ON_SET)
732 +#define MTK_2P5GPHY_LED_RX_BLINK_SET (MTK_PHY_LED_BLINK_2500RX | \
733 + MTK_GPHY_LED_RX_BLINK_SET)
734 +#define MTK_2P5GPHY_LED_TX_BLINK_SET (MTK_PHY_LED_BLINK_2500RX | \
735 + MTK_GPHY_LED_TX_BLINK_SET)
736 +
737 +#define MTK_PHY_LED_STATE_FORCE_ON 0
738 +#define MTK_PHY_LED_STATE_FORCE_BLINK 1
739 +#define MTK_PHY_LED_STATE_NETDEV 2
740 +
741 +struct mtk_socphy_priv {
742 + unsigned long led_state;
743 +};
744 +
745 +int mtk_phy_led_hw_is_supported(struct phy_device *phydev, u8 index,
746 + unsigned long rules,
747 + unsigned long supported_triggers);
748 +int mtk_phy_led_hw_ctrl_set(struct phy_device *phydev, u8 index,
749 + unsigned long rules, u16 on_set,
750 + u16 rx_blink_set, u16 tx_blink_set);
751 +int mtk_phy_led_hw_ctrl_get(struct phy_device *phydev, u8 index,
752 + unsigned long *rules, u16 on_set,
753 + u16 rx_blink_set, u16 tx_blink_set);
754 +int mtk_phy_led_num_dly_cfg(u8 index, unsigned long *delay_on,
755 + unsigned long *delay_off, bool *blinking);
756 +int mtk_phy_hw_led_on_set(struct phy_device *phydev, u8 index,
757 + u16 led_on_mask, bool on);
758 +int mtk_phy_hw_led_blink_set(struct phy_device *phydev, u8 index,
759 + bool blinking);
760 +void mtk_phy_leds_state_init(struct phy_device *phydev);
761 +
762 +#endif /* _MTK_EPHY_H_ */
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