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1 From 7fee88882704a5ed7657f467ecb44e39b20f42aa Mon Sep 17 00:00:00 2001
2 From: Tianling Shen <cnsztl@gmail.com>
3 Date: Sat, 27 Sep 2025 17:23:10 +0800
4 Subject: [PATCH] arm64: dts: rockchip: Add devicetree for the FriendlyElec
5 NanoPi R76S
6
7 The NanoPi R76S (as "R76S") is an open-sourced mini IoT gateway
8 device with two 2.5G, designed and developed by FriendlyElec.
9
10 Specification:
11 - Rockchip RK3576
12 - 2/4GB LPDDR4X RAM
13 - 2x 2500Base-T (PCIe, rtl8125b)
14 - 3x LEDs (Power, LAN, WAN)
15 - 32GB eMMC
16 - MicroSD Slot
17 - MDMI 1.4/2.0 OUT
18 - M.2 E-Key SDIO slot
19 - USB 3.0 Port
20 - USB Type-C 5V Power
21
22 Signed-off-by: Tianling Shen <cnsztl@gmail.com>
23 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
24 ---
25 arch/arm64/boot/dts/rockchip/Makefile | 1 +
26 .../arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts | 860 +++++++++++++++++++++
27 2 files changed, 861 insertions(+)
28 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts
29
30 --- a/arch/arm64/boot/dts/rockchip/Makefile
31 +++ b/arch/arm64/boot/dts/rockchip/Makefile
32 @@ -125,6 +125,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ro
33 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
34 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
35 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
36 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-r76s.dtb
37 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
38 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
39 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb
40 --- /dev/null
41 +++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts
42 @@ -0,0 +1,860 @@
43 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
44 +/*
45 + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
46 + * (http://www.friendlyelec.com)
47 + *
48 + * Copyright (c) 2025 Tianling Shen <cnsztl@gmail.com>
49 + */
50 +
51 +/dts-v1/;
52 +#include <dt-bindings/gpio/gpio.h>
53 +#include <dt-bindings/input/input.h>
54 +#include <dt-bindings/leds/common.h>
55 +#include <dt-bindings/pinctrl/rockchip.h>
56 +#include <dt-bindings/soc/rockchip,vop2.h>
57 +
58 +#include "rk3576.dtsi"
59 +
60 +/ {
61 + model = "FriendlyElec NanoPi R76S";
62 + compatible = "friendlyarm,nanopi-r76s", "rockchip,rk3576";
63 +
64 + aliases {
65 + mmc0 = &sdhci;
66 + mmc1 = &sdmmc;
67 + mmc2 = &sdio;
68 + };
69 +
70 + chosen {
71 + stdout-path = "serial0:1500000n8";
72 + };
73 +
74 + gpio-keys {
75 + compatible = "gpio-keys";
76 + pinctrl-names = "default";
77 + pinctrl-0 = <&user_but_pin>;
78 +
79 + button-reset {
80 + label = "reset";
81 + gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>;
82 + debounce-interval = <50>;
83 + linux,code = <KEY_RESTART>;
84 + wakeup-source;
85 + };
86 + };
87 +
88 + gpio-leds {
89 + compatible = "gpio-leds";
90 + pinctrl-names = "default";
91 + pinctrl-0 = <&led1_h>, <&led_sys_h>, <&led2_h>;
92 +
93 + led-0 {
94 + color = <LED_COLOR_ID_GREEN>;
95 + function = LED_FUNCTION_LAN;
96 + gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
97 + };
98 +
99 + led-1 {
100 + color = <LED_COLOR_ID_RED>;
101 + function = LED_FUNCTION_POWER;
102 + gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
103 + linux,default-trigger = "heartbeat";
104 + };
105 +
106 + led-2 {
107 + color = <LED_COLOR_ID_GREEN>;
108 + function = LED_FUNCTION_WAN;
109 + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
110 + };
111 + };
112 +
113 + hdmi-con {
114 + compatible = "hdmi-connector";
115 + hdmi-pwr-supply = <&vcc5v_hdmi_tx>;
116 + type = "a";
117 +
118 + port {
119 + hdmi_con_in: endpoint {
120 + remote-endpoint = <&hdmi_out_con>;
121 + };
122 + };
123 + };
124 +
125 + sdio_pwrseq: sdio-pwrseq {
126 + compatible = "mmc-pwrseq-simple";
127 + clocks = <&hym8563>;
128 + clock-names = "ext_clock";
129 + pinctrl-names = "default";
130 + pinctrl-0 = <&wifi_reg_on_h>;
131 + post-power-on-delay-ms = <200>;
132 + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
133 + };
134 +
135 + vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 {
136 + compatible = "regulator-fixed";
137 + regulator-always-on;
138 + regulator-boot-on;
139 + regulator-min-microvolt = <3300000>;
140 + regulator-max-microvolt = <3300000>;
141 + regulator-name = "vcc3v3_rtc_s5";
142 + vin-supply = <&vcc5v0_sys_s5>;
143 + };
144 +
145 + vcc5v_dcin: regulator-vcc5v-dcin {
146 + compatible = "regulator-fixed";
147 + regulator-always-on;
148 + regulator-boot-on;
149 + regulator-min-microvolt = <5000000>;
150 + regulator-max-microvolt = <5000000>;
151 + regulator-name = "vcc5v_dcin";
152 + };
153 +
154 + vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx {
155 + compatible = "regulator-fixed";
156 + enable-active-high;
157 + gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
158 + pinctrl-names = "default";
159 + pinctrl-0 = <&hdmi_tx_on_h>;
160 + regulator-min-microvolt = <5000000>;
161 + regulator-max-microvolt = <5000000>;
162 + regulator-name = "vcc5v_hdmi_tx";
163 + vin-supply = <&vcc5v0_sys_s5>;
164 + };
165 +
166 + vcc5v0_device_s0: regulator-vcc5v0-device-s0 {
167 + compatible = "regulator-fixed";
168 + regulator-always-on;
169 + regulator-boot-on;
170 + regulator-min-microvolt = <5000000>;
171 + regulator-max-microvolt = <5000000>;
172 + regulator-name = "vcc5v0_device_s0";
173 + vin-supply = <&vcc5v_dcin>;
174 + };
175 +
176 + vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 {
177 + compatible = "regulator-fixed";
178 + regulator-always-on;
179 + regulator-boot-on;
180 + regulator-min-microvolt = <5000000>;
181 + regulator-max-microvolt = <5000000>;
182 + regulator-name = "vcc5v0_sys_s5";
183 + vin-supply = <&vcc5v_dcin>;
184 + };
185 +
186 + vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
187 + compatible = "regulator-fixed";
188 + enable-active-high;
189 + gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
190 + pinctrl-names = "default";
191 + pinctrl-0 = <&usb_otg0_pwren_h>;
192 + regulator-min-microvolt = <5000000>;
193 + regulator-max-microvolt = <5000000>;
194 + regulator-name = "vcc5v0_usb_otg0";
195 + vin-supply = <&vcc5v0_sys_s5>;
196 + };
197 +
198 + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
199 + compatible = "regulator-fixed";
200 + regulator-always-on;
201 + regulator-boot-on;
202 + regulator-min-microvolt = <1100000>;
203 + regulator-max-microvolt = <1100000>;
204 + regulator-name = "vcc_1v1_nldo_s3";
205 + vin-supply = <&vcc5v0_sys_s5>;
206 + };
207 +
208 + vcc_1v8_s0: regulator-vcc-1v8-s0 {
209 + compatible = "regulator-fixed";
210 + regulator-always-on;
211 + regulator-boot-on;
212 + regulator-min-microvolt = <1800000>;
213 + regulator-max-microvolt = <1800000>;
214 + regulator-name = "vcc_1v8_s0";
215 + vin-supply = <&vcc_1v8_s3>;
216 + };
217 +
218 + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
219 + compatible = "regulator-fixed";
220 + regulator-always-on;
221 + regulator-boot-on;
222 + regulator-min-microvolt = <2000000>;
223 + regulator-max-microvolt = <2000000>;
224 + regulator-name = "vcc_2v0_pldo_s3";
225 + vin-supply = <&vcc5v0_sys_s5>;
226 + };
227 +
228 + vcc_3v3_s0: regulator-vcc-3v3-s0 {
229 + compatible = "regulator-fixed";
230 + regulator-always-on;
231 + regulator-boot-on;
232 + regulator-min-microvolt = <3300000>;
233 + regulator-max-microvolt = <3300000>;
234 + regulator-name = "vcc_3v3_s0";
235 + vin-supply = <&vcc_3v3_s3>;
236 + };
237 +};
238 +
239 +&combphy0_ps {
240 + status = "okay";
241 +};
242 +
243 +&combphy1_psu {
244 + status = "okay";
245 +};
246 +
247 +&cpu_b0 {
248 + cpu-supply = <&vdd_cpu_big_s0>;
249 +};
250 +
251 +&cpu_b1 {
252 + cpu-supply = <&vdd_cpu_big_s0>;
253 +};
254 +
255 +&cpu_b2 {
256 + cpu-supply = <&vdd_cpu_big_s0>;
257 +};
258 +
259 +&cpu_b3 {
260 + cpu-supply = <&vdd_cpu_big_s0>;
261 +};
262 +
263 +&cpu_l0 {
264 + cpu-supply = <&vdd_cpu_lit_s0>;
265 +};
266 +
267 +&cpu_l1 {
268 + cpu-supply = <&vdd_cpu_lit_s0>;
269 +};
270 +
271 +&cpu_l2 {
272 + cpu-supply = <&vdd_cpu_lit_s0>;
273 +};
274 +
275 +&cpu_l3 {
276 + cpu-supply = <&vdd_cpu_lit_s0>;
277 +};
278 +
279 +&gpu {
280 + mali-supply = <&vdd_gpu_s0>;
281 + status = "okay";
282 +};
283 +
284 +&hdmi {
285 + status = "okay";
286 +};
287 +
288 +&hdmi_in {
289 + hdmi_in_vp0: endpoint {
290 + remote-endpoint = <&vp0_out_hdmi>;
291 + };
292 +};
293 +
294 +&hdmi_out {
295 + hdmi_out_con: endpoint {
296 + remote-endpoint = <&hdmi_con_in>;
297 + };
298 +};
299 +
300 +&hdmi_sound {
301 + status = "okay";
302 +};
303 +
304 +&hdptxphy {
305 + status = "okay";
306 +};
307 +
308 +&i2c1 {
309 + status = "okay";
310 +
311 + pmic@23 {
312 + compatible = "rockchip,rk806";
313 + reg = <0x23>;
314 + #gpio-cells = <2>;
315 + gpio-controller;
316 + interrupt-parent = <&gpio0>;
317 + interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
318 + pinctrl-names = "default";
319 + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
320 + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
321 + system-power-controller;
322 +
323 + vcc1-supply = <&vcc5v0_sys_s5>;
324 + vcc2-supply = <&vcc5v0_sys_s5>;
325 + vcc3-supply = <&vcc5v0_sys_s5>;
326 + vcc4-supply = <&vcc5v0_sys_s5>;
327 + vcc5-supply = <&vcc5v0_sys_s5>;
328 + vcc6-supply = <&vcc5v0_sys_s5>;
329 + vcc7-supply = <&vcc5v0_sys_s5>;
330 + vcc8-supply = <&vcc5v0_sys_s5>;
331 + vcc9-supply = <&vcc5v0_sys_s5>;
332 + vcc10-supply = <&vcc5v0_sys_s5>;
333 + vcc11-supply = <&vcc_2v0_pldo_s3>;
334 + vcc12-supply = <&vcc5v0_sys_s5>;
335 + vcc13-supply = <&vcc_1v1_nldo_s3>;
336 + vcc14-supply = <&vcc_1v1_nldo_s3>;
337 + vcca-supply = <&vcc5v0_sys_s5>;
338 +
339 + rk806_dvs1_null: dvs1-null-pins {
340 + pins = "gpio_pwrctrl1";
341 + function = "pin_fun0";
342 + };
343 +
344 + rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
345 + pins = "gpio_pwrctrl1";
346 + function = "pin_fun2";
347 + };
348 +
349 + rk806_dvs1_rst: dvs1-rst-pins {
350 + pins = "gpio_pwrctrl1";
351 + function = "pin_fun3";
352 + };
353 +
354 + rk806_dvs1_slp: dvs1-slp-pins {
355 + pins = "gpio_pwrctrl1";
356 + function = "pin_fun1";
357 + };
358 +
359 + rk806_dvs2_dvs: dvs2-dvs-pins {
360 + pins = "gpio_pwrctrl2";
361 + function = "pin_fun4";
362 + };
363 +
364 + rk806_dvs2_gpio: dvs2-gpio-pins {
365 + pins = "gpio_pwrctrl2";
366 + function = "pin_fun5";
367 + };
368 +
369 + rk806_dvs2_null: dvs2-null-pins {
370 + pins = "gpio_pwrctrl2";
371 + function = "pin_fun0";
372 + };
373 +
374 + rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
375 + pins = "gpio_pwrctrl2";
376 + function = "pin_fun2";
377 + };
378 +
379 + rk806_dvs2_rst: dvs2-rst-pins {
380 + pins = "gpio_pwrctrl2";
381 + function = "pin_fun3";
382 + };
383 +
384 + rk806_dvs2_slp: dvs2-slp-pins {
385 + pins = "gpio_pwrctrl2";
386 + function = "pin_fun1";
387 + };
388 +
389 + rk806_dvs3_dvs: dvs3-dvs-pins {
390 + pins = "gpio_pwrctrl3";
391 + function = "pin_fun4";
392 + };
393 +
394 + rk806_dvs3_gpio: dvs3-gpio-pins {
395 + pins = "gpio_pwrctrl3";
396 + function = "pin_fun5";
397 + };
398 +
399 + rk806_dvs3_null: dvs3-null-pins {
400 + pins = "gpio_pwrctrl3";
401 + function = "pin_fun0";
402 + };
403 +
404 + rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
405 + pins = "gpio_pwrctrl3";
406 + function = "pin_fun2";
407 + };
408 +
409 + rk806_dvs3_rst: dvs3-rst-pins {
410 + pins = "gpio_pwrctrl3";
411 + function = "pin_fun3";
412 + };
413 +
414 + rk806_dvs3_slp: dvs3-slp-pins {
415 + pins = "gpio_pwrctrl3";
416 + function = "pin_fun1";
417 + };
418 +
419 + regulators {
420 + vdd_cpu_big_s0: dcdc-reg1 {
421 + regulator-always-on;
422 + regulator-boot-on;
423 + regulator-enable-ramp-delay = <400>;
424 + regulator-min-microvolt = <550000>;
425 + regulator-max-microvolt = <950000>;
426 + regulator-name = "vdd_cpu_big_s0";
427 + regulator-ramp-delay = <12500>;
428 +
429 + regulator-state-mem {
430 + regulator-off-in-suspend;
431 + };
432 + };
433 +
434 + vdd_npu_s0: dcdc-reg2 {
435 + regulator-boot-on;
436 + regulator-enable-ramp-delay = <400>;
437 + regulator-min-microvolt = <550000>;
438 + regulator-max-microvolt = <950000>;
439 + regulator-name = "vdd_npu_s0";
440 + regulator-ramp-delay = <12500>;
441 +
442 + regulator-state-mem {
443 + regulator-off-in-suspend;
444 + };
445 + };
446 +
447 + vdd_cpu_lit_s0: dcdc-reg3 {
448 + regulator-always-on;
449 + regulator-boot-on;
450 + regulator-min-microvolt = <550000>;
451 + regulator-max-microvolt = <950000>;
452 + regulator-name = "vdd_cpu_lit_s0";
453 + regulator-ramp-delay = <12500>;
454 +
455 + regulator-state-mem {
456 + regulator-off-in-suspend;
457 + regulator-suspend-microvolt = <750000>;
458 + };
459 + };
460 +
461 + vcc_3v3_s3: dcdc-reg4 {
462 + regulator-always-on;
463 + regulator-boot-on;
464 + regulator-min-microvolt = <3300000>;
465 + regulator-max-microvolt = <3300000>;
466 + regulator-name = "vcc_3v3_s3";
467 +
468 + regulator-state-mem {
469 + regulator-on-in-suspend;
470 + regulator-suspend-microvolt = <3300000>;
471 + };
472 + };
473 +
474 + vdd_gpu_s0: dcdc-reg5 {
475 + regulator-boot-on;
476 + regulator-enable-ramp-delay = <400>;
477 + regulator-min-microvolt = <550000>;
478 + regulator-max-microvolt = <900000>;
479 + regulator-name = "vdd_gpu_s0";
480 + regulator-ramp-delay = <12500>;
481 +
482 + regulator-state-mem {
483 + regulator-off-in-suspend;
484 + regulator-suspend-microvolt = <850000>;
485 + };
486 + };
487 +
488 + vddq_ddr_s0: dcdc-reg6 {
489 + regulator-always-on;
490 + regulator-boot-on;
491 + regulator-name = "vddq_ddr_s0";
492 +
493 + regulator-state-mem {
494 + regulator-off-in-suspend;
495 + };
496 + };
497 +
498 + vdd_logic_s0: dcdc-reg7 {
499 + regulator-always-on;
500 + regulator-boot-on;
501 + regulator-min-microvolt = <550000>;
502 + regulator-max-microvolt = <800000>;
503 + regulator-name = "vdd_logic_s0";
504 +
505 + regulator-state-mem {
506 + regulator-off-in-suspend;
507 + };
508 + };
509 +
510 + vcc_1v8_s3: dcdc-reg8 {
511 + regulator-always-on;
512 + regulator-boot-on;
513 + regulator-min-microvolt = <1800000>;
514 + regulator-max-microvolt = <1800000>;
515 + regulator-name = "vcc_1v8_s3";
516 +
517 + regulator-state-mem {
518 + regulator-on-in-suspend;
519 + regulator-suspend-microvolt = <1800000>;
520 + };
521 + };
522 +
523 + vdd2_ddr_s3: dcdc-reg9 {
524 + regulator-always-on;
525 + regulator-boot-on;
526 + regulator-name = "vdd2_ddr_s3";
527 +
528 + regulator-state-mem {
529 + regulator-on-in-suspend;
530 + };
531 + };
532 +
533 + vdd_ddr_s0: dcdc-reg10 {
534 + regulator-always-on;
535 + regulator-boot-on;
536 + regulator-min-microvolt = <550000>;
537 + regulator-max-microvolt = <1200000>;
538 + regulator-name = "vdd_ddr_s0";
539 +
540 + regulator-state-mem {
541 + regulator-off-in-suspend;
542 + };
543 + };
544 +
545 + vcca_1v8_s0: pldo-reg1 {
546 + regulator-always-on;
547 + regulator-boot-on;
548 + regulator-min-microvolt = <1800000>;
549 + regulator-max-microvolt = <1800000>;
550 + regulator-name = "vcca_1v8_s0";
551 +
552 + regulator-state-mem {
553 + regulator-off-in-suspend;
554 + };
555 + };
556 +
557 + vcca1v8_pldo2_s0: pldo-reg2 {
558 + regulator-always-on;
559 + regulator-boot-on;
560 + regulator-min-microvolt = <1800000>;
561 + regulator-max-microvolt = <1800000>;
562 + regulator-name = "vcca1v8_pldo2_s0";
563 +
564 + regulator-state-mem {
565 + regulator-off-in-suspend;
566 + };
567 + };
568 +
569 + vdda_1v2_s0: pldo-reg3 {
570 + regulator-always-on;
571 + regulator-boot-on;
572 + regulator-min-microvolt = <1200000>;
573 + regulator-max-microvolt = <1200000>;
574 + regulator-name = "vdda_1v2_s0";
575 +
576 + regulator-state-mem {
577 + regulator-off-in-suspend;
578 + };
579 + };
580 +
581 + vcca_3v3_s0: pldo-reg4 {
582 + regulator-always-on;
583 + regulator-boot-on;
584 + regulator-min-microvolt = <3300000>;
585 + regulator-max-microvolt = <3300000>;
586 + regulator-name = "vcca_3v3_s0";
587 +
588 + regulator-state-mem {
589 + regulator-off-in-suspend;
590 + };
591 + };
592 +
593 + vccio_sd_s0: pldo-reg5 {
594 + regulator-always-on;
595 + regulator-boot-on;
596 + regulator-min-microvolt = <1800000>;
597 + regulator-max-microvolt = <3300000>;
598 + regulator-name = "vccio_sd_s0";
599 +
600 + regulator-state-mem {
601 + regulator-off-in-suspend;
602 + };
603 + };
604 +
605 + vcca1v8_pldo6_s3: pldo-reg6 {
606 + regulator-always-on;
607 + regulator-boot-on;
608 + regulator-min-microvolt = <1800000>;
609 + regulator-max-microvolt = <1800000>;
610 + regulator-name = "vcca1v8_pldo6_s3";
611 +
612 + regulator-state-mem {
613 + regulator-on-in-suspend;
614 + regulator-suspend-microvolt = <1800000>;
615 + };
616 + };
617 +
618 + vdd_0v75_s3: nldo-reg1 {
619 + regulator-always-on;
620 + regulator-boot-on;
621 + regulator-min-microvolt = <750000>;
622 + regulator-max-microvolt = <750000>;
623 + regulator-name = "vdd_0v75_s3";
624 +
625 + regulator-state-mem {
626 + regulator-on-in-suspend;
627 + regulator-suspend-microvolt = <750000>;
628 + };
629 + };
630 +
631 + vdda_ddr_pll_s0: nldo-reg2 {
632 + regulator-always-on;
633 + regulator-boot-on;
634 + regulator-min-microvolt = <850000>;
635 + regulator-max-microvolt = <850000>;
636 + regulator-name = "vdda_ddr_pll_s0";
637 +
638 + regulator-state-mem {
639 + regulator-off-in-suspend;
640 + };
641 + };
642 +
643 + vdda0v75_hdmi_s0: nldo-reg3 {
644 + regulator-always-on;
645 + regulator-boot-on;
646 + regulator-min-microvolt = <837500>;
647 + regulator-max-microvolt = <837500>;
648 + regulator-name = "vdda0v75_hdmi_s0";
649 +
650 + regulator-state-mem {
651 + regulator-off-in-suspend;
652 + };
653 + };
654 +
655 + vdda_0v85_s0: nldo-reg4 {
656 + regulator-always-on;
657 + regulator-boot-on;
658 + regulator-min-microvolt = <850000>;
659 + regulator-max-microvolt = <850000>;
660 + regulator-name = "vdda_0v85_s0";
661 +
662 + regulator-state-mem {
663 + regulator-off-in-suspend;
664 + };
665 + };
666 +
667 + vdda_0v75_s0: nldo-reg5 {
668 + regulator-always-on;
669 + regulator-boot-on;
670 + regulator-min-microvolt = <750000>;
671 + regulator-max-microvolt = <750000>;
672 + regulator-name = "vdda_0v75_s0";
673 +
674 + regulator-state-mem {
675 + regulator-off-in-suspend;
676 + };
677 + };
678 + };
679 + };
680 +};
681 +
682 +&i2c2 {
683 + status = "okay";
684 +
685 + hym8563: rtc@51 {
686 + compatible = "haoyu,hym8563";
687 + reg = <0x51>;
688 + #clock-cells = <0>;
689 + clock-output-names = "hym8563";
690 + interrupt-parent = <&gpio0>;
691 + interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
692 + pinctrl-names = "default";
693 + pinctrl-0 = <&rtc_int_l>;
694 + wakeup-source;
695 + };
696 +};
697 +
698 +&pcie0 {
699 + pinctrl-names = "default";
700 + pinctrl-0 = <&pcie0_perstn>;
701 + reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
702 + vpcie3v3-supply = <&vcc_3v3_s3>;
703 + status = "okay";
704 +};
705 +
706 +&pcie1 {
707 + pinctrl-names = "default";
708 + pinctrl-0 = <&pcie1_perstn>;
709 + reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
710 + vpcie3v3-supply = <&vcc_3v3_s3>;
711 + status = "okay";
712 +};
713 +
714 +&pinctrl {
715 + bt {
716 + bt_reg_on_h: bt-reg-on-h {
717 + rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
718 + };
719 +
720 + bt_wake_host_h: bt-wake-host-h {
721 + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>;
722 + };
723 +
724 + host_wake_bt_h: host-wake-bt-h {
725 + rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
726 + };
727 + };
728 +
729 + gpio-keys {
730 + user_but_pin: user-but-pin {
731 + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
732 + };
733 + };
734 +
735 + gpio-leds {
736 + led_sys_h: led-sys-h {
737 + rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
738 + };
739 +
740 + led1_h: led1-h {
741 + rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
742 + };
743 +
744 + led2_h: led2-h {
745 + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
746 + };
747 + };
748 +
749 + hdmi {
750 + hdmi_tx_on_h: hdmi-tx-on-h {
751 + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
752 + };
753 + };
754 +
755 + hym8563 {
756 + rtc_int_l: rtc-int-l {
757 + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
758 + };
759 + };
760 +
761 + pcie {
762 + pcie0_perstn: pcie0-perstn {
763 + rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
764 + };
765 +
766 + pcie1_perstn: pcie1-perstn {
767 + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
768 + };
769 + };
770 +
771 + usb {
772 + usb_otg0_pwren_h: usb-otg0-pwren-h {
773 + rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
774 + };
775 + };
776 +
777 + wifi {
778 + wifi_wake_host_h: wifi-wake-host-h {
779 + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
780 + };
781 +
782 + wifi_reg_on_h: wifi-reg-on-h {
783 + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
784 + };
785 + };
786 +};
787 +
788 +&sai6 {
789 + status = "okay";
790 +};
791 +
792 +&sdmmc {
793 + bus-width = <4>;
794 + cap-mmc-highspeed;
795 + cap-sd-highspeed;
796 + disable-wp;
797 + no-mmc;
798 + no-sdio;
799 + sd-uhs-sdr104;
800 + vmmc-supply = <&vcc_3v3_s3>;
801 + vqmmc-supply = <&vccio_sd_s0>;
802 + status = "okay";
803 +};
804 +
805 +&sdio {
806 + #address-cells = <1>;
807 + #size-cells = <0>;
808 + bus-width = <4>;
809 + cap-sd-highspeed;
810 + cap-sdio-irq;
811 + disable-wp;
812 + keep-power-in-suspend;
813 + mmc-pwrseq = <&sdio_pwrseq>;
814 + no-mmc;
815 + no-sd;
816 + non-removable;
817 + sd-uhs-sdr104;
818 + vmmc-supply = <&vcc_3v3_s3>;
819 + vqmmc-supply = <&vcc_1v8_s3>;
820 + wakeup-source;
821 + status = "okay";
822 +
823 + rtl8822cs: wifi@1 {
824 + reg = <1>;
825 + interrupt-parent = <&gpio0>;
826 + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>;
827 + interrupt-names = "host-wake";
828 + pinctrl-names = "default";
829 + pinctrl-0 = <&wifi_wake_host_h>;
830 + };
831 +};
832 +
833 +&sdhci {
834 + bus-width = <8>;
835 + cap-mmc-highspeed;
836 + full-pwr-cycle-in-suspend;
837 + mmc-hs400-1_8v;
838 + mmc-hs400-enhanced-strobe;
839 + no-sdio;
840 + no-sd;
841 + non-removable;
842 + status = "okay";
843 +};
844 +
845 +&saradc {
846 + vref-supply = <&vcca_1v8_s0>;
847 + status = "okay";
848 +};
849 +
850 +&u2phy0 {
851 + status = "okay";
852 +};
853 +
854 +&u2phy0_otg {
855 + phy-supply = <&vcc5v0_usb_otg0>;
856 + status = "okay";
857 +};
858 +
859 +&uart0 {
860 + status = "okay";
861 +};
862 +
863 +&uart5 {
864 + pinctrl-names = "default";
865 + pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>;
866 + uart-has-rtscts;
867 + status = "okay";
868 +
869 + bluetooth {
870 + compatible = "realtek,rtl8822cs-bt";
871 + enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
872 + device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
873 + host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
874 + pinctrl-names = "default";
875 + pinctrl-0 = <&bt_wake_host_h &host_wake_bt_h &bt_reg_on_h>;
876 + };
877 +};
878 +
879 +&usbdp_phy {
880 + status = "okay";
881 +};
882 +
883 +&usb_drd0_dwc3 {
884 + dr_mode = "host";
885 + extcon = <&u2phy0>;
886 + status = "okay";
887 +};
888 +
889 +&vop {
890 + status = "okay";
891 +};
892 +
893 +&vop_mmu {
894 + status = "okay";
895 +};
896 +
897 +&vp0 {
898 + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
899 + reg = <ROCKCHIP_VOP2_EP_HDMI0>;
900 + remote-endpoint = <&hdmi_in_vp0>;
901 + };
902 +};
OpenWrt Source Repository