git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From 199cbd5f195adbc0e70ad218cdba82f45750f11b Mon Sep 17 00:00:00 2001
   2 From: Sebastian Reichel <sebastian.reichel@collabora.com>
   3 Date: Mon, 18 Sep 2023 16:14:50 +0200
   4 Subject: [PATCH] arm64: dts: rockchip: add PCIe for M.2 M-key to rock-5b
   5
   6 The Radxa Rock 5B has PCIe 3x4 routed to its M.2 M-key connector
   7 on the board's back.
   8
   9 Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
  10 Link: https://lore.kernel.org/r/20230918141451.131247-3-sebastian.reichel@collabora.com
  11 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  12 ---
  13  .../boot/dts/rockchip/rk3588-rock-5b.dts      | 35 +++++++++++++++++++
  14  1 file changed, 35 insertions(+)
  15
  16 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
  17 +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
  18 @@ -52,6 +52,19 @@
  19                 vin-supply = <&vcc_3v3_s3>;
  20         };
  21
  22 +       vcc3v3_pcie30: vcc3v3-pcie30-regulator {
  23 +               compatible = "regulator-fixed";
  24 +               enable-active-high;
  25 +               gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
  26 +               pinctrl-names = "default";
  27 +               pinctrl-0 = <&pcie3_vcc3v3_en>;
  28 +               regulator-name = "vcc3v3_pcie30";
  29 +               regulator-min-microvolt = <3300000>;
  30 +               regulator-max-microvolt = <3300000>;
  31 +               startup-delay-us = <5000>;
  32 +               vin-supply = <&vcc5v0_sys>;
  33 +       };
  34 +
  35         vcc5v0_host: vcc5v0-host-regulator {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "vcc5v0_host";
  38 @@ -224,6 +237,18 @@
  39         status = "okay";
  40  };
  41
  42 +&pcie30phy {
  43 +       status = "okay";
  44 +};
  45 +
  46 +&pcie3x4 {
  47 +       pinctrl-names = "default";
  48 +       pinctrl-0 = <&pcie3_rst>;
  49 +       reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
  50 +       vpcie3v3-supply = <&vcc3v3_pcie30>;
  51 +       status = "okay";
  52 +};
  53 +
  54  &pinctrl {
  55         hym8563 {
  56                 hym8563_int: hym8563-int {
  57 @@ -243,6 +268,16 @@
  58                 };
  59         };
  60
  61 +       pcie3 {
  62 +               pcie3_rst: pcie3-rst {
  63 +                       rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
  64 +               };
  65 +
  66 +               pcie3_vcc3v3_en: pcie3-vcc3v3-en {
  67 +                       rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
  68 +               };
  69 +       };
  70 +
  71         usb {
  72                 vcc5v0_host_en: vcc5v0-host-en {
  73                         rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;