git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From 0002c377e862140ad65b67b8b9dbf086d4578f95 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= <tszucs@protonmail.ch>
   3 Date: Wed, 11 Oct 2023 18:18:05 +0000
   4 Subject: [PATCH] arm64: dts: rockchip: Remove duplicate regulator vcc3v3_wf
   5  from rock-5b
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Regulator for VCC3V3_WF has been added as vcc3v3_pcie2x1l0 first. Clean this up.
  11
  12 Fixes: 1c9a53ff7ece ("arm64: dts: rockchip: Add sdio node to rock-5b")
  13 Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
  14 Link: https://lore.kernel.org/r/20231011181757.58047-1-tszucs@protonmail.ch
  15 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  16 ---
  17  .../boot/dts/rockchip/rk3588-rock-5b.dts      | 23 +------------------
  18  1 file changed, 1 insertion(+), 22 deletions(-)
  19
  20 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
  21 +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
  22 @@ -113,21 +113,6 @@
  23                 regulator-max-microvolt = <1100000>;
  24                 vin-supply = <&vcc5v0_sys>;
  25         };
  26 -
  27 -       vcc3v3_wf: vcc3v3-wf-regulator {
  28 -               compatible = "regulator-fixed";
  29 -               regulator-name = "vcc3v3_wf";
  30 -               regulator-always-on;
  31 -               regulator-boot-on;
  32 -               regulator-min-microvolt = <3300000>;
  33 -               regulator-max-microvolt = <3300000>;
  34 -               enable-active-high;
  35 -               gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
  36 -               pinctrl-names = "default";
  37 -               pinctrl-0 = <&vcc3v3_wf_en>;
  38 -               startup-delay-us = <50000>;
  39 -               vin-supply = <&vcc5v0_sys>;
  40 -       };
  41  };
  42
  43  &combphy0_ps {
  44 @@ -334,12 +319,6 @@
  45                         rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
  46                 };
  47         };
  48 -
  49 -       m2e {
  50 -               vcc3v3_wf_en: vcc3v3-wf-en {
  51 -                       rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
  52 -               };
  53 -       };
  54  };
  55
  56  &pwm1 {
  57 @@ -390,7 +369,7 @@
  58         sd-uhs-sdr25;
  59         sd-uhs-sdr50;
  60         sd-uhs-sdr104;
  61 -       vmmc-supply = <&vcc3v3_wf>;
  62 +       vmmc-supply = <&vcc3v3_pcie2x1l0>;
  63         vqmmc-supply = <&vcc_1v8_s3>;
  64         pinctrl-names = "default";
  65         pinctrl-0 = <&sdiom0_pins>;