git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From da681ed73fb980286fc29de707b35d76bb33e123 Mon Sep 17 00:00:00 2001
   2 From: Heiner Kallweit <hkallweit1@gmail.com>
   3 Date: Thu, 13 Feb 2025 20:18:17 +0100
   4 Subject: [PATCH] net: phy: realtek: improve mmd register access for internal
   5  PHY's
   6
   7 r8169 provides the MDIO bus for the internal PHY's. It has been extended
   8 with c45 access functions for addressing MDIO_MMD_VEND2 registers.
   9 So we can switch from paged access to directly addressing the
  10 MDIO_MMD_VEND2 registers.
  11
  12 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  13 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  14 Link: https://patch.msgid.link/a5f2333c-dda9-48ad-9801-77049766e632@gmail.com
  15 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  16 ---
  17  drivers/net/phy/realtek/realtek_main.c | 79 +++++++++++---------------
  18  1 file changed, 33 insertions(+), 46 deletions(-)
  19
  20 --- a/drivers/net/phy/realtek/realtek_main.c
  21 +++ b/drivers/net/phy/realtek/realtek_main.c
  22 @@ -735,29 +735,31 @@ static int rtlgen_read_status(struct phy
  23         return 0;
  24  }
  25
  26 +static int rtlgen_read_vend2(struct phy_device *phydev, int regnum)
  27 +{
  28 +       return __mdiobus_c45_read(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum);
  29 +}
  30 +
  31 +static int rtlgen_write_vend2(struct phy_device *phydev, int regnum, u16 val)
  32 +{
  33 +       return __mdiobus_c45_write(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum,
  34 +                                  val);
  35 +}
  36 +
  37  static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
  38  {
  39         int ret;
  40
  41 -       if (devnum == MDIO_MMD_VEND2) {
  42 -               rtl821x_write_page(phydev, regnum >> 4);
  43 -               ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
  44 -               rtl821x_write_page(phydev, 0);
  45 -       } else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
  46 -               rtl821x_write_page(phydev, 0xa5c);
  47 -               ret = __phy_read(phydev, 0x12);
  48 -               rtl821x_write_page(phydev, 0);
  49 -       } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
  50 -               rtl821x_write_page(phydev, 0xa5d);
  51 -               ret = __phy_read(phydev, 0x10);
  52 -               rtl821x_write_page(phydev, 0);
  53 -       } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
  54 -               rtl821x_write_page(phydev, 0xa5d);
  55 -               ret = __phy_read(phydev, 0x11);
  56 -               rtl821x_write_page(phydev, 0);
  57 -       } else {
  58 +       if (devnum == MDIO_MMD_VEND2)
  59 +               ret = rtlgen_read_vend2(phydev, regnum);
  60 +       else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE)
  61 +               ret = rtlgen_read_vend2(phydev, 0xa5c4);
  62 +       else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
  63 +               ret = rtlgen_read_vend2(phydev, 0xa5d0);
  64 +       else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE)
  65 +               ret = rtlgen_read_vend2(phydev, 0xa5d2);
  66 +       else
  67                 ret = -EOPNOTSUPP;
  68 -       }
  69
  70         return ret;
  71  }
  72 @@ -767,17 +769,12 @@ static int rtlgen_write_mmd(struct phy_d
  73  {
  74         int ret;
  75
  76 -       if (devnum == MDIO_MMD_VEND2) {
  77 -               rtl821x_write_page(phydev, regnum >> 4);
  78 -               ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
  79 -               rtl821x_write_page(phydev, 0);
  80 -       } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
  81 -               rtl821x_write_page(phydev, 0xa5d);
  82 -               ret = __phy_write(phydev, 0x10, val);
  83 -               rtl821x_write_page(phydev, 0);
  84 -       } else {
  85 +       if (devnum == MDIO_MMD_VEND2)
  86 +               ret = rtlgen_write_vend2(phydev, regnum, val);
  87 +       else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
  88 +               ret = rtlgen_write_vend2(phydev, regnum, 0xa5d0);
  89 +       else
  90                 ret = -EOPNOTSUPP;
  91 -       }
  92
  93         return ret;
  94  }
  95 @@ -789,19 +786,12 @@ static int rtl822x_read_mmd(struct phy_d
  96         if (ret != -EOPNOTSUPP)
  97                 return ret;
  98
  99 -       if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
 100 -               rtl821x_write_page(phydev, 0xa6e);
 101 -               ret = __phy_read(phydev, 0x16);
 102 -               rtl821x_write_page(phydev, 0);
 103 -       } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
 104 -               rtl821x_write_page(phydev, 0xa6d);
 105 -               ret = __phy_read(phydev, 0x12);
 106 -               rtl821x_write_page(phydev, 0);
 107 -       } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
 108 -               rtl821x_write_page(phydev, 0xa6d);
 109 -               ret = __phy_read(phydev, 0x10);
 110 -               rtl821x_write_page(phydev, 0);
 111 -       }
 112 +       if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2)
 113 +               ret = rtlgen_read_vend2(phydev, 0xa6ec);
 114 +       else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
 115 +               ret = rtlgen_read_vend2(phydev, 0xa6d4);
 116 +       else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2)
 117 +               ret = rtlgen_read_vend2(phydev, 0xa6d0);
 118
 119         return ret;
 120  }
 121 @@ -814,11 +804,8 @@ static int rtl822x_write_mmd(struct phy_
 122         if (ret != -EOPNOTSUPP)
 123                 return ret;
 124
 125 -       if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
 126 -               rtl821x_write_page(phydev, 0xa6d);
 127 -               ret = __phy_write(phydev, 0x12, val);
 128 -               rtl821x_write_page(phydev, 0);
 129 -       }
 130 +       if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
 131 +               ret = rtlgen_write_vend2(phydev, 0xa6d4, val);
 132
 133         return ret;
 134  }