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  85 From: Christian Marangi <ansuelsmth@gmail.com>
  86 To: Bjorn Andersson <andersson@kernel.org>,
  87         Michael Turquette <mturquette@baylibre.com>,
  88         Stephen Boyd <sboyd@kernel.org>,
  89         Christian Marangi <ansuelsmth@gmail.com>,
  90         linux-arm-msm@vger.kernel.org,
  91         linux-clk@vger.kernel.org,
  92         linux-kernel@vger.kernel.org
  93 Cc: stable@vger.kernel.org
  94 Subject: [PATCH] clk: qcom: gcc-ipq8074: fix broken freq table for
  95  nss_port6_tx_clk_src
  96 Date: Thu, 22 May 2025 22:25:55 +0200
  97 Message-ID: <20250522202600.4028-1-ansuelsmth@gmail.com>
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 105
 106 With the conversion done by commit e88f03230dc0 ("clk: qcom: gcc-ipq8074:
 107 rework nss_port5/6 clock to multiple conf") a Copy-Paste error was made
 108 for the nss_port6_tx_clk_src frequency table.
 109
 110 This was caused by the wrong setting of the parent in
 111 ftbl_nss_port6_tx_clk_src that was wrongly set to P_UNIPHY1_RX instead
 112 of P_UNIPHY2_TX.
 113
 114 This cause the UNIPHY2 port to malfunction when it needs to be scaled to
 115 higher clock. The malfunction was observed with the example scenario
 116 with an Aquantia 10G PHY connected and a speed higher than 1G (example
 117 2.5G)
 118
 119 Fix the broken frequency table to restore original functionality.
 120
 121 Cc: stable@vger.kernel.org
 122 Fixes: e88f03230dc0 ("clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple conf")
 123 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 124 ---
 125  drivers/clk/qcom/gcc-ipq8074.c | 6 +++---
 126  1 file changed, 3 insertions(+), 3 deletions(-)
 127
 128 --- a/drivers/clk/qcom/gcc-ipq8074.c
 129 +++ b/drivers/clk/qcom/gcc-ipq8074.c
 130 @@ -1895,10 +1895,10 @@ static const struct freq_conf ftbl_nss_p
 131  static const struct freq_multi_tbl ftbl_nss_port6_tx_clk_src[] = {
 132         FMS(19200000, P_XO, 1, 0, 0),
 133         FM(25000000, ftbl_nss_port6_tx_clk_src_25),
 134 -       FMS(78125000, P_UNIPHY1_RX, 4, 0, 0),
 135 +       FMS(78125000, P_UNIPHY2_TX, 4, 0, 0),
 136         FM(125000000, ftbl_nss_port6_tx_clk_src_125),
 137 -       FMS(156250000, P_UNIPHY1_RX, 2, 0, 0),
 138 -       FMS(312500000, P_UNIPHY1_RX, 1, 0, 0),
 139 +       FMS(156250000, P_UNIPHY2_TX, 2, 0, 0),
 140 +       FMS(312500000, P_UNIPHY2_TX, 1, 0, 0),
 141         { }
 142  };
 143