1e2418bee38ba40b729459bc0f20a260d47cbd5c
[openwrt/staging/stintel.git] /
1 From a0fb7eca9c099867596cbd1a44cc740882bdcbbe Mon Sep 17 00:00:00 2001
2 From: Stephen Chen <stephen@radxa.com>
3 Date: Tue, 18 Feb 2025 11:04:19 -0500
4 Subject: [PATCH] arm64: dts: rockchip: Add Radxa ROCK 4D device tree
5
6 The Radxa ROCK 4D board is based on the Rockchip rk3576 SoC.
7
8 The device tree adds support for basic devices:
9 - UART
10 - SD Card
11 - Ethernet
12 - USB
13 - RTC
14
15 It has 4 USB ports but only 3 are usable as the top left one is used
16 for maskrom.
17
18 It has a USB-C port that is only used for powering the board.
19
20 Signed-off-by: Stephen Chen <stephen@radxa.com>
21 Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
22 Link: https://lore.kernel.org/r/20250218160714.140709-3-detlev.casanova@collabora.com
23 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
24 ---
25 arch/arm64/boot/dts/rockchip/Makefile | 1 +
26 .../boot/dts/rockchip/rk3576-rock-4d.dts | 689 ++++++++++++++++++
27 2 files changed, 690 insertions(+)
28 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
29
30 --- a/arch/arm64/boot/dts/rockchip/Makefile
31 +++ b/arch/arm64/boot/dts/rockchip/Makefile
32 @@ -125,6 +125,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ro
33 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
34 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
35 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
36 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
37 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
38 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb
39 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb
40 --- /dev/null
41 +++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
42 @@ -0,0 +1,689 @@
43 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
44 +/*
45 + * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.
46 + */
47 +
48 +/dts-v1/;
49 +
50 +#include <dt-bindings/gpio/gpio.h>
51 +#include <dt-bindings/leds/common.h>
52 +#include <dt-bindings/pinctrl/rockchip.h>
53 +#include <dt-bindings/pwm/pwm.h>
54 +#include <dt-bindings/soc/rockchip,vop2.h>
55 +#include <dt-bindings/usb/pd.h>
56 +#include "rk3576.dtsi"
57 +
58 +/ {
59 + model = "Radxa ROCK 4D";
60 + compatible = "radxa,rock-4d", "rockchip,rk3576";
61 +
62 + aliases {
63 + ethernet0 = &gmac0;
64 + mmc0 = &sdmmc;
65 + };
66 +
67 + chosen {
68 + stdout-path = "serial0:1500000n8";
69 + };
70 +
71 + leds: leds {
72 + compatible = "gpio-leds";
73 + pinctrl-names = "default";
74 + pinctrl-0 = <&led_rgb_g &led_rgb_r>;
75 +
76 + power-led {
77 + color = <LED_COLOR_ID_GREEN>;
78 + function = LED_FUNCTION_STATUS;
79 + gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
80 + linux,default-trigger = "default-on";
81 + };
82 +
83 + user-led {
84 + color = <LED_COLOR_ID_BLUE>;
85 + function = LED_FUNCTION_HEARTBEAT;
86 + gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
87 + linux,default-trigger = "heartbeat";
88 + };
89 + };
90 +
91 + vcc_12v0_dcin: regulator-vcc-12v0-dcin {
92 + compatible = "regulator-fixed";
93 + regulator-always-on;
94 + regulator-boot-on;
95 + regulator-min-microvolt = <12000000>;
96 + regulator-max-microvolt = <12000000>;
97 + regulator-name = "vcc_12v0_dcin";
98 + };
99 +
100 + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
101 + compatible = "regulator-fixed";
102 + regulator-always-on;
103 + regulator-boot-on;
104 + regulator-min-microvolt = <1100000>;
105 + regulator-max-microvolt = <1100000>;
106 + regulator-name = "vcc_1v1_nldo_s3";
107 + vin-supply = <&vcc_5v0_sys>;
108 + };
109 +
110 + vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 {
111 + compatible = "regulator-fixed";
112 + regulator-always-on;
113 + regulator-boot-on;
114 + regulator-min-microvolt = <1200000>;
115 + regulator-max-microvolt = <1200000>;
116 + regulator-name = "vcc_1v2_ufs_vccq_s0";
117 + vin-supply = <&vcc_5v0_sys>;
118 + };
119 +
120 + vcc_1v8_s0: regulator-vcc-1v8-s0 {
121 + compatible = "regulator-fixed";
122 + regulator-always-on;
123 + regulator-boot-on;
124 + regulator-min-microvolt = <1800000>;
125 + regulator-max-microvolt = <1800000>;
126 + regulator-name = "vcc_1v8_s0";
127 + vin-supply = <&vcc_1v8_s3>;
128 + };
129 +
130 + vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 {
131 + compatible = "regulator-fixed";
132 + regulator-always-on;
133 + regulator-boot-on;
134 + regulator-min-microvolt = <1800000>;
135 + regulator-max-microvolt = <1800000>;
136 + regulator-name = "vcc_1v8_ufs_vccq2_s0";
137 + vin-supply = <&vcc_1v8_s3>;
138 + };
139 +
140 + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
141 + compatible = "regulator-fixed";
142 + regulator-always-on;
143 + regulator-boot-on;
144 + regulator-min-microvolt = <2000000>;
145 + regulator-max-microvolt = <2000000>;
146 + regulator-name = "vcc_2v0_pldo_s3";
147 + vin-supply = <&vcc_5v0_sys>;
148 + };
149 +
150 + vcc_3v3_pcie: regulator-vcc-3v3-pcie {
151 + compatible = "regulator-fixed";
152 + enable-active-high;
153 + gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
154 + pinctrl-names = "default";
155 + pinctrl-0 = <&pcie_pwren>;
156 + regulator-min-microvolt = <3300000>;
157 + regulator-max-microvolt = <3300000>;
158 + regulator-name = "vcc_3v3_pcie";
159 + startup-delay-us = <5000>;
160 + vin-supply = <&vcc_5v0_sys>;
161 + };
162 +
163 + vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {
164 + compatible = "regulator-fixed";
165 + regulator-always-on;
166 + regulator-boot-on;
167 + regulator-min-microvolt = <3300000>;
168 + regulator-max-microvolt = <3300000>;
169 + regulator-name = "vcc_3v3_rtc_s5";
170 + vin-supply = <&vcc_5v0_sys>;
171 + };
172 +
173 + vcc_3v3_s0: regulator-vcc-3v3-s0 {
174 + compatible = "regulator-fixed";
175 + regulator-always-on;
176 + regulator-boot-on;
177 + regulator-min-microvolt = <3300000>;
178 + regulator-max-microvolt = <3300000>;
179 + regulator-name = "vcc_3v3_s0";
180 + vin-supply = <&vcc_3v3_s3>;
181 + };
182 +
183 + vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 {
184 + compatible = "regulator-fixed";
185 + regulator-always-on;
186 + regulator-boot-on;
187 + regulator-min-microvolt = <3300000>;
188 + regulator-max-microvolt = <3300000>;
189 + regulator-name = "vcc_3v3_ufs_s0";
190 + vin-supply = <&vcc_5v0_sys>;
191 + };
192 +
193 + vcc_5v0_device: regulator-vcc-5v0-device {
194 + compatible = "regulator-fixed";
195 + regulator-always-on;
196 + regulator-boot-on;
197 + regulator-min-microvolt = <5000000>;
198 + regulator-max-microvolt = <5000000>;
199 + regulator-name = "vcc_5v0_device";
200 + vin-supply = <&vcc_12v0_dcin>;
201 + };
202 +
203 + vcc_5v0_host: regulator-vcc-5v0-host {
204 + compatible = "regulator-fixed";
205 + enable-active-high;
206 + gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
207 + pinctrl-names = "default";
208 + pinctrl-0 = <&usb_host_pwren>;
209 + regulator-always-on;
210 + regulator-boot-on;
211 + regulator-min-microvolt = <5000000>;
212 + regulator-max-microvolt = <5000000>;
213 + regulator-name = "vcc5v0_host";
214 + vin-supply = <&vcc_5v0_device>;
215 + };
216 +
217 + vcc_5v0_sys: regulator-vcc-5v0-sys {
218 + compatible = "regulator-fixed";
219 + regulator-always-on;
220 + regulator-boot-on;
221 + regulator-min-microvolt = <5000000>;
222 + regulator-max-microvolt = <5000000>;
223 + regulator-name = "vcc_5v0_sys";
224 + vin-supply = <&vcc_12v0_dcin>;
225 + };
226 +};
227 +
228 +&combphy1_psu {
229 + status = "okay";
230 +};
231 +
232 +&cpu_b0 {
233 + cpu-supply = <&vdd_cpu_big_s0>;
234 +};
235 +
236 +&cpu_b1 {
237 + cpu-supply = <&vdd_cpu_big_s0>;
238 +};
239 +
240 +&cpu_b2 {
241 + cpu-supply = <&vdd_cpu_big_s0>;
242 +};
243 +
244 +&cpu_b3 {
245 + cpu-supply = <&vdd_cpu_big_s0>;
246 +};
247 +
248 +&cpu_l0 {
249 + cpu-supply = <&vdd_cpu_lit_s0>;
250 +};
251 +
252 +&cpu_l1 {
253 + cpu-supply = <&vdd_cpu_lit_s0>;
254 +};
255 +
256 +&cpu_l2 {
257 + cpu-supply = <&vdd_cpu_lit_s0>;
258 +};
259 +
260 +&cpu_l3 {
261 + cpu-supply = <&vdd_cpu_lit_s0>;
262 +};
263 +
264 +&gmac0 {
265 + clock_in_out = "output";
266 + phy-handle = <&rgmii_phy0>;
267 + phy-mode = "rgmii-id";
268 + pinctrl-names = "default";
269 + pinctrl-0 = <&eth0m0_miim
270 + &eth0m0_tx_bus2
271 + &eth0m0_rx_bus2
272 + &eth0m0_rgmii_clk
273 + &eth0m0_rgmii_bus
274 + &ethm0_clk0_25m_out>;
275 + status = "okay";
276 +};
277 +
278 +&gpu {
279 + mali-supply = <&vdd_gpu_s0>;
280 + status = "okay";
281 +};
282 +
283 +&i2c1 {
284 + status = "okay";
285 +
286 + pmic@23 {
287 + compatible = "rockchip,rk806";
288 + reg = <0x23>;
289 + #gpio-cells = <2>;
290 + gpio-controller;
291 + interrupt-parent = <&gpio0>;
292 + interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
293 + pinctrl-names = "default";
294 + pinctrl-0 = <&pmic_pins
295 + &rk806_dvs1_null
296 + &rk806_dvs2_null
297 + &rk806_dvs3_null>;
298 + system-power-controller;
299 + vcc1-supply = <&vcc_5v0_sys>;
300 + vcc2-supply = <&vcc_5v0_sys>;
301 + vcc3-supply = <&vcc_5v0_sys>;
302 + vcc4-supply = <&vcc_5v0_sys>;
303 + vcc5-supply = <&vcc_5v0_sys>;
304 + vcc6-supply = <&vcc_5v0_sys>;
305 + vcc7-supply = <&vcc_5v0_sys>;
306 + vcc8-supply = <&vcc_5v0_sys>;
307 + vcc9-supply = <&vcc_5v0_sys>;
308 + vcc10-supply = <&vcc_5v0_sys>;
309 + vcc11-supply = <&vcc_2v0_pldo_s3>;
310 + vcc12-supply = <&vcc_5v0_sys>;
311 + vcc13-supply = <&vcc_1v1_nldo_s3>;
312 + vcc14-supply = <&vcc_1v1_nldo_s3>;
313 + vcca-supply = <&vcc_5v0_sys>;
314 +
315 + rk806_dvs1_null: dvs1-null-pins {
316 + pins = "gpio_pwrctrl1";
317 + function = "pin_fun0";
318 + };
319 +
320 + rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
321 + pins = "gpio_pwrctrl1";
322 + function = "pin_fun2";
323 + };
324 +
325 + rk806_dvs1_rst: dvs1-rst-pins {
326 + pins = "gpio_pwrctrl1";
327 + function = "pin_fun3";
328 + };
329 +
330 + rk806_dvs1_slp: dvs1-slp-pins {
331 + pins = "gpio_pwrctrl1";
332 + function = "pin_fun1";
333 + };
334 +
335 + rk806_dvs2_dvs: dvs2-dvs-pins {
336 + pins = "gpio_pwrctrl2";
337 + function = "pin_fun4";
338 + };
339 +
340 + rk806_dvs2_gpio: dvs2-gpio-pins {
341 + pins = "gpio_pwrctrl2";
342 + function = "pin_fun5";
343 + };
344 +
345 + rk806_dvs2_null: dvs2-null-pins {
346 + pins = "gpio_pwrctrl2";
347 + function = "pin_fun0";
348 + };
349 +
350 + rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
351 + pins = "gpio_pwrctrl2";
352 + function = "pin_fun2";
353 + };
354 +
355 + rk806_dvs2_rst: dvs2-rst-pins {
356 + pins = "gpio_pwrctrl2";
357 + function = "pin_fun3";
358 + };
359 +
360 + rk806_dvs2_slp: dvs2-slp-pins {
361 + pins = "gpio_pwrctrl2";
362 + function = "pin_fun1";
363 + };
364 +
365 + rk806_dvs3_dvs: dvs3-dvs-pins {
366 + pins = "gpio_pwrctrl3";
367 + function = "pin_fun4";
368 + };
369 +
370 + rk806_dvs3_gpio: dvs3-gpio-pins {
371 + pins = "gpio_pwrctrl3";
372 + function = "pin_fun5";
373 + };
374 +
375 + rk806_dvs3_null: dvs3-null-pins {
376 + pins = "gpio_pwrctrl3";
377 + function = "pin_fun0";
378 + };
379 +
380 + rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
381 + pins = "gpio_pwrctrl3";
382 + function = "pin_fun2";
383 + };
384 +
385 + rk806_dvs3_rst: dvs3-rst-pins {
386 + pins = "gpio_pwrctrl3";
387 + function = "pin_fun3";
388 + };
389 +
390 + rk806_dvs3_slp: dvs3-slp-pins {
391 + pins = "gpio_pwrctrl3";
392 + function = "pin_fun1";
393 + };
394 +
395 + regulators {
396 + vdd_cpu_big_s0: dcdc-reg1 {
397 + regulator-always-on;
398 + regulator-boot-on;
399 + regulator-enable-ramp-delay = <400>;
400 + regulator-min-microvolt = <550000>;
401 + regulator-max-microvolt = <950000>;
402 + regulator-name = "vdd_cpu_big_s0";
403 + regulator-ramp-delay = <12500>;
404 + regulator-state-mem {
405 + regulator-off-in-suspend;
406 + };
407 + };
408 +
409 + vdd_npu_s0: dcdc-reg2 {
410 + regulator-boot-on;
411 + regulator-enable-ramp-delay = <400>;
412 + regulator-min-microvolt = <550000>;
413 + regulator-max-microvolt = <950000>;
414 + regulator-name = "vdd_npu_s0";
415 + regulator-ramp-delay = <12500>;
416 + regulator-state-mem {
417 + regulator-off-in-suspend;
418 + };
419 + };
420 +
421 + vdd_cpu_lit_s0: dcdc-reg3 {
422 + regulator-always-on;
423 + regulator-boot-on;
424 + regulator-min-microvolt = <550000>;
425 + regulator-max-microvolt = <950000>;
426 + regulator-name = "vdd_cpu_lit_s0";
427 + regulator-ramp-delay = <12500>;
428 + regulator-state-mem {
429 + regulator-off-in-suspend;
430 + regulator-suspend-microvolt = <750000>;
431 + };
432 + };
433 +
434 + vcc_3v3_s3: dcdc-reg4 {
435 + regulator-always-on;
436 + regulator-boot-on;
437 + regulator-min-microvolt = <3300000>;
438 + regulator-max-microvolt = <3300000>;
439 + regulator-name = "vcc_3v3_s3";
440 + regulator-state-mem {
441 + regulator-on-in-suspend;
442 + regulator-suspend-microvolt = <3300000>;
443 + };
444 + };
445 +
446 + vdd_gpu_s0: dcdc-reg5 {
447 + regulator-boot-on;
448 + regulator-enable-ramp-delay = <400>;
449 + regulator-min-microvolt = <550000>;
450 + regulator-max-microvolt = <900000>;
451 + regulator-name = "vdd_gpu_s0";
452 + regulator-ramp-delay = <12500>;
453 + regulator-state-mem {
454 + regulator-off-in-suspend;
455 + regulator-suspend-microvolt = <850000>;
456 + };
457 + };
458 +
459 + vddq_ddr_s0: dcdc-reg6 {
460 + regulator-always-on;
461 + regulator-boot-on;
462 + regulator-name = "vddq_ddr_s0";
463 + regulator-state-mem {
464 + regulator-off-in-suspend;
465 + };
466 + };
467 +
468 + vdd_logic_s0: dcdc-reg7 {
469 + regulator-always-on;
470 + regulator-boot-on;
471 + regulator-min-microvolt = <550000>;
472 + regulator-max-microvolt = <800000>;
473 + regulator-name = "vdd_logic_s0";
474 + regulator-state-mem {
475 + regulator-off-in-suspend;
476 + };
477 + };
478 +
479 + vcc_1v8_s3: dcdc-reg8 {
480 + regulator-always-on;
481 + regulator-boot-on;
482 + regulator-min-microvolt = <1800000>;
483 + regulator-max-microvolt = <1800000>;
484 + regulator-name = "vcc_1v8_s3";
485 + regulator-state-mem {
486 + regulator-on-in-suspend;
487 + regulator-suspend-microvolt = <1800000>;
488 + };
489 + };
490 +
491 + vdd2_ddr_s3: dcdc-reg9 {
492 + regulator-always-on;
493 + regulator-boot-on;
494 + regulator-name = "vdd2_ddr_s3";
495 + regulator-state-mem {
496 + regulator-on-in-suspend;
497 + };
498 + };
499 +
500 + vdd_ddr_s0: dcdc-reg10 {
501 + regulator-always-on;
502 + regulator-boot-on;
503 + regulator-min-microvolt = <550000>;
504 + regulator-max-microvolt = <1200000>;
505 + regulator-name = "vdd_ddr_s0";
506 + regulator-state-mem {
507 + regulator-off-in-suspend;
508 + };
509 + };
510 +
511 + vcca_1v8_s0: pldo-reg1 {
512 + regulator-always-on;
513 + regulator-boot-on;
514 + regulator-min-microvolt = <1800000>;
515 + regulator-max-microvolt = <1800000>;
516 + regulator-name = "vcca_1v8_s0";
517 + regulator-state-mem {
518 + regulator-off-in-suspend;
519 + };
520 + };
521 +
522 + vcca1v8_pldo2_s0: pldo-reg2 {
523 + regulator-always-on;
524 + regulator-boot-on;
525 + regulator-min-microvolt = <1800000>;
526 + regulator-max-microvolt = <1800000>;
527 + regulator-name = "vcca1v8_pldo2_s0";
528 + regulator-state-mem {
529 + regulator-off-in-suspend;
530 + };
531 + };
532 +
533 + vdda_1v2_s0: pldo-reg3 {
534 + regulator-always-on;
535 + regulator-boot-on;
536 + regulator-min-microvolt = <1200000>;
537 + regulator-max-microvolt = <1200000>;
538 + regulator-name = "vdda_1v2_s0";
539 + regulator-state-mem {
540 + regulator-off-in-suspend;
541 + };
542 + };
543 +
544 + vcca_3v3_s0: pldo-reg4 {
545 + regulator-always-on;
546 + regulator-boot-on;
547 + regulator-min-microvolt = <3300000>;
548 + regulator-max-microvolt = <3300000>;
549 + regulator-name = "vcca_3v3_s0";
550 + regulator-state-mem {
551 + regulator-off-in-suspend;
552 + };
553 + };
554 +
555 + vccio_sd_s0: pldo-reg5 {
556 + regulator-always-on;
557 + regulator-boot-on;
558 + regulator-min-microvolt = <1800000>;
559 + regulator-max-microvolt = <3300000>;
560 + regulator-name = "vccio_sd_s0";
561 + regulator-state-mem {
562 + regulator-off-in-suspend;
563 + };
564 + };
565 +
566 + vcca1v8_pldo6_s3: pldo-reg6 {
567 + regulator-always-on;
568 + regulator-boot-on;
569 + regulator-min-microvolt = <1800000>;
570 + regulator-max-microvolt = <1800000>;
571 + regulator-name = "vcca1v8_pldo6_s3";
572 + regulator-state-mem {
573 + regulator-on-in-suspend;
574 + regulator-suspend-microvolt = <1800000>;
575 + };
576 + };
577 +
578 + vdd_0v75_s3: nldo-reg1 {
579 + regulator-always-on;
580 + regulator-boot-on;
581 + regulator-min-microvolt = <750000>;
582 + regulator-max-microvolt = <750000>;
583 + regulator-name = "vdd_0v75_s3";
584 + regulator-state-mem {
585 + regulator-on-in-suspend;
586 + regulator-suspend-microvolt = <750000>;
587 + };
588 + };
589 +
590 + vdda_ddr_pll_s0: nldo-reg2 {
591 + regulator-always-on;
592 + regulator-boot-on;
593 + regulator-min-microvolt = <850000>;
594 + regulator-max-microvolt = <850000>;
595 + regulator-name = "vdda_ddr_pll_s0";
596 + regulator-state-mem {
597 + regulator-off-in-suspend;
598 + };
599 + };
600 +
601 + vdda0v75_hdmi_s0: nldo-reg3 {
602 + regulator-always-on;
603 + regulator-boot-on;
604 + regulator-min-microvolt = <837500>;
605 + regulator-max-microvolt = <837500>;
606 + regulator-name = "vdda0v75_hdmi_s0";
607 + regulator-state-mem {
608 + regulator-off-in-suspend;
609 + };
610 + };
611 +
612 + vdda_0v85_s0: nldo-reg4 {
613 + regulator-always-on;
614 + regulator-boot-on;
615 + regulator-min-microvolt = <850000>;
616 + regulator-max-microvolt = <850000>;
617 + regulator-name = "vdda_0v85_s0";
618 + regulator-state-mem {
619 + regulator-off-in-suspend;
620 + };
621 + };
622 +
623 + vdda_0v75_s0: nldo-reg5 {
624 + regulator-always-on;
625 + regulator-boot-on;
626 + regulator-min-microvolt = <750000>;
627 + regulator-max-microvolt = <750000>;
628 + regulator-name = "vdda_0v75_s0";
629 + regulator-state-mem {
630 + regulator-off-in-suspend;
631 + };
632 + };
633 + };
634 + };
635 +};
636 +
637 +&i2c2 {
638 + status = "okay";
639 +
640 + hym8563: rtc@51 {
641 + compatible = "haoyu,hym8563";
642 + reg = <0x51>;
643 + #clock-cells = <0>;
644 + clock-output-names = "hym8563";
645 + interrupt-parent = <&gpio0>;
646 + interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
647 + pinctrl-names = "default";
648 + pinctrl-0 = <&hym8563_int>;
649 + wakeup-source;
650 + };
651 +};
652 +
653 +&mdio0 {
654 + rgmii_phy0: ethernet-phy@1 {
655 + compatible = "ethernet-phy-ieee802.3-c22";
656 + reg = <0x1>;
657 + clocks = <&cru REFCLKO25M_GMAC0_OUT>;
658 + pinctrl-names = "default";
659 + pinctrl-0 = <&rtl8211f_rst>;
660 + reset-assert-us = <20000>;
661 + reset-deassert-us = <100000>;
662 + reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
663 + };
664 +};
665 +
666 +&pinctrl {
667 + hym8563 {
668 + hym8563_int: hym8563-int {
669 + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
670 + };
671 + };
672 +
673 + leds {
674 + led_rgb_g: led-green-en {
675 + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
676 + };
677 + led_rgb_r: led-red-en {
678 + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
679 + };
680 + };
681 +
682 + rtl8211f {
683 + rtl8211f_rst: rtl8211f-rst {
684 + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
685 + };
686 + };
687 +
688 + pcie {
689 + pcie_pwren: pcie-pwren {
690 + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
691 + };
692 + };
693 +
694 + usb {
695 + usb_host_pwren: usb-host-pwren {
696 + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
697 + };
698 + };
699 +};
700 +
701 +&sdmmc {
702 + bus-width = <4>;
703 + cap-mmc-highspeed;
704 + cap-sd-highspeed;
705 + disable-wp;
706 + max-frequency = <200000000>;
707 + no-sdio;
708 + no-mmc;
709 + sd-uhs-sdr104;
710 + vmmc-supply = <&vcc_3v3_s3>;
711 + vqmmc-supply = <&vccio_sd_s0>;
712 + status = "okay";
713 +};
714 +
715 +&u2phy0 {
716 + status = "okay";
717 +};
718 +
719 +&u2phy1 {
720 + status = "okay";
721 +};
722 +
723 +&uart0 {
724 + pinctrl-0 = <&uart0m0_xfer>;
725 + status = "okay";
726 +};
727 +
728 +&usb_drd1_dwc3 {
729 + dr_mode = "host";
730 + status = "okay";
731 +};