1b1dda2327bdf46935576889efb240ae8eeb1389
[openwrt/staging/pepe2k.git] /
1 From 34501d047ac0a6cbb13285ba9d15f75c1deb7da7 Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Tue, 15 Apr 2025 12:53:05 +0200
4 Subject: [PATCH 18/20] net: phy: mediatek: init val in .phy_led_polarity_set
5 for AN7581
6
7 Fix smatch warning for uninitialised val in .phy_led_polarity_set for
8 AN7581 driver.
9
10 Correctly init to 0 to set polarity high by default.
11
12 Reported-by: Simon Horman <horms@kernel.org>
13 Fixes: 6a325aed130b ("net: phy: mediatek: add Airoha PHY ID to SoC driver")
14 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
15 Link: https://patch.msgid.link/20250415105313.3409-1-ansuelsmth@gmail.com
16 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
17 ---
18 drivers/net/phy/mediatek/mtk-ge-soc.c | 3 +--
19 1 file changed, 1 insertion(+), 2 deletions(-)
20
21 --- a/drivers/net/phy/mediatek/mtk-ge-soc.c
22 +++ b/drivers/net/phy/mediatek/mtk-ge-soc.c
23 @@ -1431,8 +1431,8 @@ static int an7581_phy_probe(struct phy_d
24 static int an7581_phy_led_polarity_set(struct phy_device *phydev, int index,
25 unsigned long modes)
26 {
27 + u16 val = 0;
28 u32 mode;
29 - u16 val;
30
31 if (index >= MTK_PHY_MAX_LEDS)
32 return -EINVAL;
33 @@ -1443,7 +1443,6 @@ static int an7581_phy_led_polarity_set(s
34 val = MTK_PHY_LED_ON_POLARITY;
35 break;
36 case PHY_LED_ACTIVE_HIGH:
37 - val = 0;
38 break;
39 default:
40 return -EINVAL;