063622398a98d21646564da93bdcc06d830a4970
[openwrt/openwrt.git] /
1 From 651c9e71ffe44e99b5a9b011271c2117f0353b32 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
3 Date: Sat, 14 Jun 2025 09:59:58 +0200
4 Subject: [PATCH] net: dsa: b53: fix unicast/multicast flooding on BCM5325
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 BCM5325 doesn't implement UC_FLOOD_MASK, MC_FLOOD_MASK and IPMC_FLOOD_MASK
10 registers.
11 This has to be handled differently with other pages and registers.
12
13 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
14 Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
15 Link: https://patch.msgid.link/20250614080000.1884236-13-noltari@gmail.com
16 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
17 ---
18 drivers/net/dsa/b53/b53_common.c | 60 ++++++++++++++++++++++----------
19 drivers/net/dsa/b53/b53_regs.h | 13 +++++++
20 2 files changed, 55 insertions(+), 18 deletions(-)
21
22 --- a/drivers/net/dsa/b53/b53_common.c
23 +++ b/drivers/net/dsa/b53/b53_common.c
24 @@ -564,12 +564,24 @@ static void b53_port_set_ucast_flood(str
25 {
26 u16 uc;
27
28 - b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &uc);
29 - if (unicast)
30 - uc |= BIT(port);
31 - else
32 - uc &= ~BIT(port);
33 - b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);
34 + if (is5325(dev)) {
35 + if (port == B53_CPU_PORT_25)
36 + port = B53_CPU_PORT;
37 +
38 + b53_read16(dev, B53_IEEE_PAGE, B53_IEEE_UCAST_DLF, &uc);
39 + if (unicast)
40 + uc |= BIT(port) | B53_IEEE_UCAST_DROP_EN;
41 + else
42 + uc &= ~BIT(port);
43 + b53_write16(dev, B53_IEEE_PAGE, B53_IEEE_UCAST_DLF, uc);
44 + } else {
45 + b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &uc);
46 + if (unicast)
47 + uc |= BIT(port);
48 + else
49 + uc &= ~BIT(port);
50 + b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);
51 + }
52 }
53
54 static void b53_port_set_mcast_flood(struct b53_device *dev, int port,
55 @@ -577,19 +589,31 @@ static void b53_port_set_mcast_flood(str
56 {
57 u16 mc;
58
59 - b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &mc);
60 - if (multicast)
61 - mc |= BIT(port);
62 - else
63 - mc &= ~BIT(port);
64 - b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);
65 -
66 - b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &mc);
67 - if (multicast)
68 - mc |= BIT(port);
69 - else
70 - mc &= ~BIT(port);
71 - b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);
72 + if (is5325(dev)) {
73 + if (port == B53_CPU_PORT_25)
74 + port = B53_CPU_PORT;
75 +
76 + b53_read16(dev, B53_IEEE_PAGE, B53_IEEE_MCAST_DLF, &mc);
77 + if (multicast)
78 + mc |= BIT(port) | B53_IEEE_MCAST_DROP_EN;
79 + else
80 + mc &= ~BIT(port);
81 + b53_write16(dev, B53_IEEE_PAGE, B53_IEEE_MCAST_DLF, mc);
82 + } else {
83 + b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &mc);
84 + if (multicast)
85 + mc |= BIT(port);
86 + else
87 + mc &= ~BIT(port);
88 + b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);
89 +
90 + b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &mc);
91 + if (multicast)
92 + mc |= BIT(port);
93 + else
94 + mc &= ~BIT(port);
95 + b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);
96 + }
97 }
98
99 static void b53_port_set_learning(struct b53_device *dev, int port,
100 --- a/drivers/net/dsa/b53/b53_regs.h
101 +++ b/drivers/net/dsa/b53/b53_regs.h
102 @@ -29,6 +29,7 @@
103 #define B53_ARLIO_PAGE 0x05 /* ARL Access */
104 #define B53_FRAMEBUF_PAGE 0x06 /* Management frame access */
105 #define B53_MEM_ACCESS_PAGE 0x08 /* Memory access */
106 +#define B53_IEEE_PAGE 0x0a /* IEEE 802.1X */
107
108 /* PHY Registers */
109 #define B53_PORT_MII_PAGE(i) (0x10 + (i)) /* Port i MII Registers */
110 @@ -372,6 +373,18 @@
111 #define B53_ARL_SRCH_RSTL(x) (B53_ARL_SRCH_RSTL_0 + ((x) * 0x10))
112
113 /*************************************************************************
114 + * IEEE 802.1X Registers
115 + *************************************************************************/
116 +
117 +/* Multicast DLF Drop Control register (16 bit) */
118 +#define B53_IEEE_MCAST_DLF 0x94
119 +#define B53_IEEE_MCAST_DROP_EN BIT(11)
120 +
121 +/* Unicast DLF Drop Control register (16 bit) */
122 +#define B53_IEEE_UCAST_DLF 0x96
123 +#define B53_IEEE_UCAST_DROP_EN BIT(11)
124 +
125 +/*************************************************************************
126 * Port VLAN Registers
127 *************************************************************************/
128