git.openwrt.org Git - openwrt/staging/linusw.git/blob

   1 From b039a10b277af6aeb245e3b791e2dd4ab161698c Mon Sep 17 00:00:00 2001
   2 From: Jonathan Bell <jonathan@raspberrypi.com>
   3 Date: Thu, 11 Jan 2024 16:33:22 +0000
   4 Subject: [PATCH 0849/1085] drivers: w1-gpio: add flag to force read-polling
   5  while delaying
   6
   7 On Pi 5, the link to RP1 will bounce in and out of L1 depending on
   8 inactivity timers at both the RC and EP end. Unfortunately for
   9 bitbashing 1-wire, this means that on an otherwise idle Pi 5 many of the
  10 reads/writes to GPIO registers are delayed by up to 8us which causes
  11 mis-sampling of read data and trashes write bits.
  12
  13 By issuing dummy reads at a rate greater than the link inactivity
  14 timeout while spinning on a delay, PCIe stays in L0 which does not incur
  15 additional latency.
  16
  17 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  18 ---
  19  drivers/w1/masters/w1-gpio.c |  3 +++
  20  drivers/w1/w1_io.c           | 37 ++++++++++++++++++++++++------------
  21  include/linux/w1.h           |  5 +++++
  22  3 files changed, 33 insertions(+), 12 deletions(-)
  23
  24 --- a/drivers/w1/masters/w1-gpio.c
  25 +++ b/drivers/w1/masters/w1-gpio.c
  26 @@ -90,6 +90,9 @@ static int w1_gpio_probe(struct platform
  27                 if (of_property_present(np, "linux,open-drain"))
  28                         gflags = GPIOD_OUT_LOW;
  29
  30 +               if (of_property_present(np, "raspberrypi,delay-needs-poll"))
  31 +                       master->delay_needs_poll = true;
  32 +
  33                 pdev->dev.platform_data = pdata;
  34         }
  35         pdata = dev_get_platdata(dev);
  36 --- a/drivers/w1/w1_io.c
  37 +++ b/drivers/w1/w1_io.c
  38 @@ -6,6 +6,7 @@
  39  #include <asm/io.h>
  40
  41  #include <linux/delay.h>
  42 +#include <linux/ktime.h>
  43  #include <linux/moduleparam.h>
  44  #include <linux/module.h>
  45
  46 @@ -36,9 +37,21 @@ static u8 w1_crc8_table[] = {
  47         116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
  48  };
  49
  50 -static void w1_delay(unsigned long tm)
  51 +static void w1_delay(struct w1_master *dev, unsigned long tm)
  52  {
  53 -       udelay(tm * w1_delay_parm);
  54 +       ktime_t start, delta;
  55 +
  56 +       if (!dev->bus_master->delay_needs_poll) {
  57 +               udelay(tm * w1_delay_parm);
  58 +               return;
  59 +       }
  60 +
  61 +       start = ktime_get();
  62 +       delta = ktime_add(start, ns_to_ktime(1000 * tm * w1_delay_parm));
  63 +       do {
  64 +               dev->bus_master->read_bit(dev->bus_master->data);
  65 +               udelay(1);
  66 +       } while (ktime_before(ktime_get(), delta));
  67  }
  68
  69  static void w1_write_bit(struct w1_master *dev, int bit);
  70 @@ -77,14 +90,14 @@ static void w1_write_bit(struct w1_maste
  71
  72         if (bit) {
  73                 dev->bus_master->write_bit(dev->bus_master->data, 0);
  74 -               w1_delay(6);
  75 +               w1_delay(dev, 6);
  76                 dev->bus_master->write_bit(dev->bus_master->data, 1);
  77 -               w1_delay(64);
  78 +               w1_delay(dev, 64);
  79         } else {
  80                 dev->bus_master->write_bit(dev->bus_master->data, 0);
  81 -               w1_delay(60);
  82 +               w1_delay(dev, 60);
  83                 dev->bus_master->write_bit(dev->bus_master->data, 1);
  84 -               w1_delay(10);
  85 +               w1_delay(dev, 10);
  86         }
  87
  88         if(w1_disable_irqs) local_irq_restore(flags);
  89 @@ -164,14 +177,14 @@ static u8 w1_read_bit(struct w1_master *
  90         /* sample timing is critical here */
  91         local_irq_save(flags);
  92         dev->bus_master->write_bit(dev->bus_master->data, 0);
  93 -       w1_delay(6);
  94 +       w1_delay(dev, 6);
  95         dev->bus_master->write_bit(dev->bus_master->data, 1);
  96 -       w1_delay(9);
  97 +       w1_delay(dev, 9);
  98
  99         result = dev->bus_master->read_bit(dev->bus_master->data);
 100         local_irq_restore(flags);
 101
 102 -       w1_delay(55);
 103 +       w1_delay(dev, 55);
 104
 105         return result & 0x1;
 106  }
 107 @@ -333,16 +346,16 @@ int w1_reset_bus(struct w1_master *dev)
 108                  * cpu for such a short amount of time AND get it back in
 109                  * the maximum amount of time.
 110                  */
 111 -               w1_delay(500);
 112 +               w1_delay(dev, 500);
 113                 dev->bus_master->write_bit(dev->bus_master->data, 1);
 114 -               w1_delay(70);
 115 +               w1_delay(dev, 70);
 116
 117                 result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
 118                 /* minimum 70 (above) + 430 = 500 us
 119                  * There aren't any timing requirements between a reset and
 120                  * the following transactions.  Sleeping is safe here.
 121                  */
 122 -               /* w1_delay(430); min required time */
 123 +               /* w1_delay(dev, 430); min required time */
 124                 msleep(1);
 125         }
 126
 127 --- a/include/linux/w1.h
 128 +++ b/include/linux/w1.h
 129 @@ -121,6 +121,9 @@ typedef void (*w1_slave_found_callback)(
 130   * @dev_id: Optional device id string, which w1 slaves could use for
 131   * creating names, which then give a connection to the w1 master
 132   *
 133 + * @delay_needs_poll: work around jitter introduced with GPIO controllers
 134 + * accessed over PCIe (RP1)
 135 + *
 136   * Note: read_bit and write_bit are very low level functions and should only
 137   * be used with hardware that doesn't really support 1-wire operations,
 138   * like a parallel/serial port.
 139 @@ -155,6 +158,8 @@ struct w1_bus_master {
 140                 u8, w1_slave_found_callback);
 141
 142         char            *dev_id;
 143 +
 144 +       bool            delay_needs_poll;
 145  };
 146
 147  /**